riscv/insn_trans/trans_rvzfh.c.inc

45     TCGv_i64 dest;
59     dest = cpu_fpr[a->rd];
60     tcg_gen_qemu_ld_i64(dest, t0, ctx->mem_idx, MO_TEUW);
61     gen_nanbox_h(dest, dest);
92     TCGv_i64 dest = dest_fpr(ctx, a->rd);
98     gen_helper_fmadd_h(dest, tcg_env, src1, src2, src3);
99     gen_set_fpr_hs(ctx, a->rd, dest);
109     TCGv_i64 dest = dest_fpr(ctx, a->rd);
115     gen_helper_fmsub_h(dest, tcg_env, src1, src2, src3);
116     gen_set_fpr_hs(ctx, a->rd, dest);
126     TCGv_i64 dest = dest_fpr(ctx, a->rd);
132     gen_helper_fnmsub_h(dest, tcg_env, src1, src2, src3);
133     gen_set_fpr_hs(ctx, a->rd, dest);
143     TCGv_i64 dest = dest_fpr(ctx, a->rd);
149     gen_helper_fnmadd_h(dest, tcg_env, src1, src2, src3);
150     gen_set_fpr_hs(ctx, a->rd, dest);
160     TCGv_i64 dest = dest_fpr(ctx, a->rd);
165     gen_helper_fadd_h(dest, tcg_env, src1, src2);
166     gen_set_fpr_hs(ctx, a->rd, dest);
176     TCGv_i64 dest = dest_fpr(ctx, a->rd);
181     gen_helper_fsub_h(dest, tcg_env, src1, src2);
182     gen_set_fpr_hs(ctx, a->rd, dest);
192     TCGv_i64 dest = dest_fpr(ctx, a->rd);
197     gen_helper_fmul_h(dest, tcg_env, src1, src2);
198     gen_set_fpr_hs(ctx, a->rd, dest);
208     TCGv_i64 dest = dest_fpr(ctx, a->rd);
213     gen_helper_fdiv_h(dest, tcg_env, src1, src2);
214     gen_set_fpr_hs(ctx, a->rd, dest);
224     TCGv_i64 dest = dest_fpr(ctx, a->rd);
228     gen_helper_fsqrt_h(dest, tcg_env, src1);
229     gen_set_fpr_hs(ctx, a->rd, dest);
239     TCGv_i64 dest = dest_fpr(ctx, a->rd);
244             gen_check_nanbox_h(dest, src1);
246             tcg_gen_ext16s_i64(dest, src1);
258             tcg_gen_deposit_i64(dest, rs2, rs1, 0, 15);
260             tcg_gen_deposit_i64(dest, src2, src1, 0, 15);
261             tcg_gen_ext16s_i64(dest, dest);
264     gen_set_fpr_hs(ctx, a->rd, dest);
276     TCGv_i64 dest = dest_fpr(ctx, a->rd);
287         tcg_gen_xori_i64(dest, rs1, MAKE_64BIT_MASK(15, 1));
305         tcg_gen_and_i64(dest, mask, rs1);
306         tcg_gen_or_i64(dest, dest, rs2);
310         tcg_gen_ext16s_i64(dest, dest);
323     TCGv_i64 dest = dest_fpr(ctx, a->rd);
334         tcg_gen_andi_i64(dest, rs1, ~MAKE_64BIT_MASK(15, 1));
349         tcg_gen_andi_i64(dest, rs2, MAKE_64BIT_MASK(15, 1));
350         tcg_gen_xor_i64(dest, rs1, dest);
354         tcg_gen_ext16s_i64(dest, dest);
365     TCGv_i64 dest = dest_fpr(ctx, a->rd);
369     gen_helper_fmin_h(dest, tcg_env, src1, src2);
370     gen_set_fpr_hs(ctx, a->rd, dest);
380     TCGv_i64 dest = dest_fpr(ctx, a->rd);
384     gen_helper_fmax_h(dest, tcg_env, src1, src2);
385     gen_set_fpr_hs(ctx, a->rd, dest);
395     TCGv_i64 dest = dest_fpr(ctx, a->rd);
399     gen_helper_fcvt_s_h(dest, tcg_env, src1);
400     gen_set_fpr_hs(ctx, a->rd, dest);
413     TCGv_i64 dest = dest_fpr(ctx, a->rd);
417     gen_helper_fcvt_d_h(dest, tcg_env, src1);
418     gen_set_fpr_d(ctx, a->rd, dest);
430     TCGv_i64 dest = dest_fpr(ctx, a->rd);
434     gen_helper_fcvt_h_s(dest, tcg_env, src1);
435     gen_set_fpr_hs(ctx, a->rd, dest);
447     TCGv_i64 dest = dest_fpr(ctx, a->rd);
451     gen_helper_fcvt_h_d(dest, tcg_env, src1);
452     gen_set_fpr_hs(ctx, a->rd, dest);
463     TCGv dest = dest_gpr(ctx, a->rd);
467     gen_helper_feq_h(dest, tcg_env, src1, src2);
468     gen_set_gpr(ctx, a->rd, dest);
477     TCGv dest = dest_gpr(ctx, a->rd);
481     gen_helper_flt_h(dest, tcg_env, src1, src2);
482     gen_set_gpr(ctx, a->rd, dest);
492     TCGv dest = dest_gpr(ctx, a->rd);
496     gen_helper_fle_h(dest, tcg_env, src1, src2);
497     gen_set_gpr(ctx, a->rd, dest);
506     TCGv dest = dest_gpr(ctx, a->rd);
509     gen_helper_fclass_h(dest, tcg_env, src1);
510     gen_set_gpr(ctx, a->rd, dest);
519     TCGv dest = dest_gpr(ctx, a->rd);
523     gen_helper_fcvt_w_h(dest, tcg_env, src1);
524     gen_set_gpr(ctx, a->rd, dest);
533     TCGv dest = dest_gpr(ctx, a->rd);
537     gen_helper_fcvt_wu_h(dest, tcg_env, src1);
538     gen_set_gpr(ctx, a->rd, dest);
547     TCGv_i64 dest = dest_fpr(ctx, a->rd);
551     gen_helper_fcvt_h_w(dest, tcg_env, t0);
552     gen_set_fpr_hs(ctx, a->rd, dest);
563     TCGv_i64 dest = dest_fpr(ctx, a->rd);
567     gen_helper_fcvt_h_wu(dest, tcg_env, t0);
568     gen_set_fpr_hs(ctx, a->rd, dest);
579     TCGv dest = dest_gpr(ctx, a->rd);
583     tcg_gen_ext16s_tl(dest, cpu_fpr[a->rs1]);
586     tcg_gen_extrl_i64_i32(dest, cpu_fpr[a->rs1]);
587     tcg_gen_ext16s_tl(dest, dest);
590     gen_set_gpr(ctx, a->rd, dest);
614     TCGv dest = dest_gpr(ctx, a->rd);
618     gen_helper_fcvt_l_h(dest, tcg_env, src1);
619     gen_set_gpr(ctx, a->rd, dest);
629     TCGv dest = dest_gpr(ctx, a->rd);
633     gen_helper_fcvt_lu_h(dest, tcg_env, src1);
634     gen_set_gpr(ctx, a->rd, dest);
644     TCGv_i64 dest = dest_fpr(ctx, a->rd);
648     gen_helper_fcvt_h_l(dest, tcg_env, t0);
649     gen_set_fpr_hs(ctx, a->rd, dest);
661     TCGv_i64 dest = dest_fpr(ctx, a->rd);
665     gen_helper_fcvt_h_lu(dest, tcg_env, t0);
666     gen_set_fpr_hs(ctx, a->rd, dest);