Lines Matching +full:- +full:a
2 * RISC-V translation routines for the RV64Zfh Standard Extension.
4 * Copyright (c) 2020 Chih-Min Chao, chihmin.chao@sifive.com
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
20 if (!ctx->cfg_ptr->ext_zfh) { \
26 if (!ctx->cfg_ptr->ext_zhinx && !ctx->cfg_ptr->ext_zfh) { \
32 if (!ctx->cfg_ptr->ext_zfhmin && !ctx->cfg_ptr->ext_zfbfmin) { \
38 if (!(ctx->cfg_ptr->ext_zfhmin || ctx->cfg_ptr->ext_zhinxmin)) { \
43 static bool trans_flh(DisasContext *ctx, arg_flh *a)
52 t0 = get_gpr(ctx, a->rs1, EXT_NONE);
53 if (a->imm) {
55 tcg_gen_addi_tl(temp, t0, a->imm);
59 dest = cpu_fpr[a->rd];
60 tcg_gen_qemu_ld_i64(dest, t0, ctx->mem_idx, MO_TEUW);
67 static bool trans_fsh(DisasContext *ctx, arg_fsh *a)
75 t0 = get_gpr(ctx, a->rs1, EXT_NONE);
76 if (a->imm) {
78 tcg_gen_addi_tl(temp, t0, a->imm);
82 tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], t0, ctx->mem_idx, MO_TEUW);
87 static bool trans_fmadd_h(DisasContext *ctx, arg_fmadd_h *a)
92 TCGv_i64 dest = dest_fpr(ctx, a->rd);
93 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
94 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
95 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
97 gen_set_rm(ctx, a->rm);
99 gen_set_fpr_hs(ctx, a->rd, dest);
104 static bool trans_fmsub_h(DisasContext *ctx, arg_fmsub_h *a)
109 TCGv_i64 dest = dest_fpr(ctx, a->rd);
110 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
111 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
112 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
114 gen_set_rm(ctx, a->rm);
116 gen_set_fpr_hs(ctx, a->rd, dest);
121 static bool trans_fnmsub_h(DisasContext *ctx, arg_fnmsub_h *a)
126 TCGv_i64 dest = dest_fpr(ctx, a->rd);
127 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
128 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
129 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
131 gen_set_rm(ctx, a->rm);
133 gen_set_fpr_hs(ctx, a->rd, dest);
138 static bool trans_fnmadd_h(DisasContext *ctx, arg_fnmadd_h *a)
143 TCGv_i64 dest = dest_fpr(ctx, a->rd);
144 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
145 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
146 TCGv_i64 src3 = get_fpr_hs(ctx, a->rs3);
148 gen_set_rm(ctx, a->rm);
150 gen_set_fpr_hs(ctx, a->rd, dest);
155 static bool trans_fadd_h(DisasContext *ctx, arg_fadd_h *a)
160 TCGv_i64 dest = dest_fpr(ctx, a->rd);
161 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
162 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
164 gen_set_rm(ctx, a->rm);
166 gen_set_fpr_hs(ctx, a->rd, dest);
171 static bool trans_fsub_h(DisasContext *ctx, arg_fsub_h *a)
176 TCGv_i64 dest = dest_fpr(ctx, a->rd);
177 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
178 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
180 gen_set_rm(ctx, a->rm);
182 gen_set_fpr_hs(ctx, a->rd, dest);
187 static bool trans_fmul_h(DisasContext *ctx, arg_fmul_h *a)
192 TCGv_i64 dest = dest_fpr(ctx, a->rd);
193 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
194 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
196 gen_set_rm(ctx, a->rm);
198 gen_set_fpr_hs(ctx, a->rd, dest);
203 static bool trans_fdiv_h(DisasContext *ctx, arg_fdiv_h *a)
208 TCGv_i64 dest = dest_fpr(ctx, a->rd);
209 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
210 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
212 gen_set_rm(ctx, a->rm);
214 gen_set_fpr_hs(ctx, a->rd, dest);
219 static bool trans_fsqrt_h(DisasContext *ctx, arg_fsqrt_h *a)
224 TCGv_i64 dest = dest_fpr(ctx, a->rd);
225 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
227 gen_set_rm(ctx, a->rm);
229 gen_set_fpr_hs(ctx, a->rd, dest);
234 static bool trans_fsgnj_h(DisasContext *ctx, arg_fsgnj_h *a)
239 TCGv_i64 dest = dest_fpr(ctx, a->rd);
240 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
242 if (a->rs1 == a->rs2) { /* FMOV */
243 if (!ctx->cfg_ptr->ext_zfinx) {
249 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
251 if (!ctx->cfg_ptr->ext_zfinx) {
264 gen_set_fpr_hs(ctx, a->rd, dest);
269 static bool trans_fsgnjn_h(DisasContext *ctx, arg_fsgnjn_h *a)
276 TCGv_i64 dest = dest_fpr(ctx, a->rd);
277 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
280 if (!ctx->cfg_ptr->ext_zfinx) {
286 if (a->rs1 == a->rs2) { /* FNEG */
289 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
292 if (!ctx->cfg_ptr->ext_zfinx) {
308 /* signed-extended instead of nanboxing for result if enable zfinx */
309 if (ctx->cfg_ptr->ext_zfinx) {
316 static bool trans_fsgnjx_h(DisasContext *ctx, arg_fsgnjx_h *a)
323 TCGv_i64 dest = dest_fpr(ctx, a->rd);
324 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
327 if (!ctx->cfg_ptr->ext_zfinx) {
333 if (a->rs1 == a->rs2) { /* FABS */
336 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
339 if (!ctx->cfg_ptr->ext_zfinx) {
352 /* signed-extended instead of nanboxing for result if enable zfinx */
353 if (ctx->cfg_ptr->ext_zfinx) {
360 static bool trans_fmin_h(DisasContext *ctx, arg_fmin_h *a)
365 TCGv_i64 dest = dest_fpr(ctx, a->rd);
366 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
367 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
370 gen_set_fpr_hs(ctx, a->rd, dest);
375 static bool trans_fmax_h(DisasContext *ctx, arg_fmax_h *a)
380 TCGv_i64 dest = dest_fpr(ctx, a->rd);
381 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
382 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
385 gen_set_fpr_hs(ctx, a->rd, dest);
390 static bool trans_fcvt_s_h(DisasContext *ctx, arg_fcvt_s_h *a)
395 TCGv_i64 dest = dest_fpr(ctx, a->rd);
396 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
398 gen_set_rm(ctx, a->rm);
400 gen_set_fpr_hs(ctx, a->rd, dest);
407 static bool trans_fcvt_d_h(DisasContext *ctx, arg_fcvt_d_h *a)
413 TCGv_i64 dest = dest_fpr(ctx, a->rd);
414 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
416 gen_set_rm(ctx, a->rm);
418 gen_set_fpr_d(ctx, a->rd, dest);
425 static bool trans_fcvt_h_s(DisasContext *ctx, arg_fcvt_h_s *a)
430 TCGv_i64 dest = dest_fpr(ctx, a->rd);
431 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
433 gen_set_rm(ctx, a->rm);
435 gen_set_fpr_hs(ctx, a->rd, dest);
441 static bool trans_fcvt_h_d(DisasContext *ctx, arg_fcvt_h_d *a)
447 TCGv_i64 dest = dest_fpr(ctx, a->rd);
448 TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
450 gen_set_rm(ctx, a->rm);
452 gen_set_fpr_hs(ctx, a->rd, dest);
458 static bool trans_feq_h(DisasContext *ctx, arg_feq_h *a)
463 TCGv dest = dest_gpr(ctx, a->rd);
464 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
465 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
468 gen_set_gpr(ctx, a->rd, dest);
472 static bool trans_flt_h(DisasContext *ctx, arg_flt_h *a)
477 TCGv dest = dest_gpr(ctx, a->rd);
478 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
479 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
482 gen_set_gpr(ctx, a->rd, dest);
487 static bool trans_fle_h(DisasContext *ctx, arg_fle_h *a)
492 TCGv dest = dest_gpr(ctx, a->rd);
493 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
494 TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
497 gen_set_gpr(ctx, a->rd, dest);
501 static bool trans_fclass_h(DisasContext *ctx, arg_fclass_h *a)
506 TCGv dest = dest_gpr(ctx, a->rd);
507 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
510 gen_set_gpr(ctx, a->rd, dest);
514 static bool trans_fcvt_w_h(DisasContext *ctx, arg_fcvt_w_h *a)
519 TCGv dest = dest_gpr(ctx, a->rd);
520 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
522 gen_set_rm(ctx, a->rm);
524 gen_set_gpr(ctx, a->rd, dest);
528 static bool trans_fcvt_wu_h(DisasContext *ctx, arg_fcvt_wu_h *a)
533 TCGv dest = dest_gpr(ctx, a->rd);
534 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
536 gen_set_rm(ctx, a->rm);
538 gen_set_gpr(ctx, a->rd, dest);
542 static bool trans_fcvt_h_w(DisasContext *ctx, arg_fcvt_h_w *a)
547 TCGv_i64 dest = dest_fpr(ctx, a->rd);
548 TCGv t0 = get_gpr(ctx, a->rs1, EXT_SIGN);
550 gen_set_rm(ctx, a->rm);
552 gen_set_fpr_hs(ctx, a->rd, dest);
558 static bool trans_fcvt_h_wu(DisasContext *ctx, arg_fcvt_h_wu *a)
563 TCGv_i64 dest = dest_fpr(ctx, a->rd);
564 TCGv t0 = get_gpr(ctx, a->rs1, EXT_SIGN);
566 gen_set_rm(ctx, a->rm);
568 gen_set_fpr_hs(ctx, a->rd, dest);
574 static bool trans_fmv_x_h(DisasContext *ctx, arg_fmv_x_h *a)
579 TCGv dest = dest_gpr(ctx, a->rd);
582 /* 16 bits -> 64 bits */
583 tcg_gen_ext16s_tl(dest, cpu_fpr[a->rs1]);
585 /* 16 bits -> 32 bits */
586 tcg_gen_extrl_i64_i32(dest, cpu_fpr[a->rs1]);
590 gen_set_gpr(ctx, a->rd, dest);
594 static bool trans_fmv_h_x(DisasContext *ctx, arg_fmv_h_x *a)
599 TCGv t0 = get_gpr(ctx, a->rs1, EXT_ZERO);
601 tcg_gen_extu_tl_i64(cpu_fpr[a->rd], t0);
602 gen_nanbox_h(cpu_fpr[a->rd], cpu_fpr[a->rd]);
608 static bool trans_fcvt_l_h(DisasContext *ctx, arg_fcvt_l_h *a)
614 TCGv dest = dest_gpr(ctx, a->rd);
615 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
617 gen_set_rm(ctx, a->rm);
619 gen_set_gpr(ctx, a->rd, dest);
623 static bool trans_fcvt_lu_h(DisasContext *ctx, arg_fcvt_lu_h *a)
629 TCGv dest = dest_gpr(ctx, a->rd);
630 TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
632 gen_set_rm(ctx, a->rm);
634 gen_set_gpr(ctx, a->rd, dest);
638 static bool trans_fcvt_h_l(DisasContext *ctx, arg_fcvt_h_l *a)
644 TCGv_i64 dest = dest_fpr(ctx, a->rd);
645 TCGv t0 = get_gpr(ctx, a->rs1, EXT_SIGN);
647 gen_set_rm(ctx, a->rm);
649 gen_set_fpr_hs(ctx, a->rd, dest);
655 static bool trans_fcvt_h_lu(DisasContext *ctx, arg_fcvt_h_lu *a)
661 TCGv_i64 dest = dest_fpr(ctx, a->rd);
662 TCGv t0 = get_gpr(ctx, a->rs1, EXT_SIGN);
664 gen_set_rm(ctx, a->rm);
666 gen_set_fpr_hs(ctx, a->rd, dest);