Lines Matching refs:riscv_has_ext
68 if (env->priv == PRV_U && riscv_has_ext(env, RVS)) { in smstateen_acc_ok()
153 if (riscv_has_ext(env, RVS) && env->priv == PRV_U && in ctr()
291 if (riscv_has_ext(env, RVS)) { in smode()
327 if (riscv_has_ext(env, RVH)) { in hmode()
346 if (riscv_has_ext(env, RVU)) { in umode()
519 if (riscv_has_ext(env, RVJ)) { in pointer_masking()
637 if (riscv_has_ext(env, RVF)) { in write_fflags()
656 if (riscv_has_ext(env, RVF)) { in write_frm()
676 if (riscv_has_ext(env, RVF)) { in write_fcsr()
847 inh_avail_mask |= riscv_has_ext(env, RVU) ? MCYCLECFG_BIT_UINH : 0; in write_mcyclecfg()
848 inh_avail_mask |= riscv_has_ext(env, RVS) ? MCYCLECFG_BIT_SINH : 0; in write_mcyclecfg()
849 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_mcyclecfg()
850 riscv_has_ext(env, RVU)) ? MCYCLECFG_BIT_VUINH : 0; in write_mcyclecfg()
851 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_mcyclecfg()
852 riscv_has_ext(env, RVS)) ? MCYCLECFG_BIT_VSINH : 0; in write_mcyclecfg()
873 inh_avail_mask |= riscv_has_ext(env, RVU) ? MCYCLECFGH_BIT_UINH : 0; in write_mcyclecfgh()
874 inh_avail_mask |= riscv_has_ext(env, RVS) ? MCYCLECFGH_BIT_SINH : 0; in write_mcyclecfgh()
875 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_mcyclecfgh()
876 riscv_has_ext(env, RVU)) ? MCYCLECFGH_BIT_VUINH : 0; in write_mcyclecfgh()
877 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_mcyclecfgh()
878 riscv_has_ext(env, RVS)) ? MCYCLECFGH_BIT_VSINH : 0; in write_mcyclecfgh()
900 inh_avail_mask |= riscv_has_ext(env, RVU) ? MINSTRETCFG_BIT_UINH : 0; in write_minstretcfg()
901 inh_avail_mask |= riscv_has_ext(env, RVS) ? MINSTRETCFG_BIT_SINH : 0; in write_minstretcfg()
902 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_minstretcfg()
903 riscv_has_ext(env, RVU)) ? MINSTRETCFG_BIT_VUINH : 0; in write_minstretcfg()
904 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_minstretcfg()
905 riscv_has_ext(env, RVS)) ? MINSTRETCFG_BIT_VSINH : 0; in write_minstretcfg()
924 inh_avail_mask |= riscv_has_ext(env, RVU) ? MINSTRETCFGH_BIT_UINH : 0; in write_minstretcfgh()
925 inh_avail_mask |= riscv_has_ext(env, RVS) ? MINSTRETCFGH_BIT_SINH : 0; in write_minstretcfgh()
926 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_minstretcfgh()
927 riscv_has_ext(env, RVU)) ? MINSTRETCFGH_BIT_VUINH : 0; in write_minstretcfgh()
928 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_minstretcfgh()
929 riscv_has_ext(env, RVS)) ? MINSTRETCFGH_BIT_VSINH : 0; in write_minstretcfgh()
958 inh_avail_mask |= riscv_has_ext(env, RVU) ? MHPMEVENT_BIT_UINH : 0; in write_mhpmevent()
959 inh_avail_mask |= riscv_has_ext(env, RVS) ? MHPMEVENT_BIT_SINH : 0; in write_mhpmevent()
960 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_mhpmevent()
961 riscv_has_ext(env, RVU)) ? MHPMEVENT_BIT_VUINH : 0; in write_mhpmevent()
962 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_mhpmevent()
963 riscv_has_ext(env, RVS)) ? MHPMEVENT_BIT_VSINH : 0; in write_mhpmevent()
992 inh_avail_mask |= riscv_has_ext(env, RVU) ? MHPMEVENTH_BIT_UINH : 0; in write_mhpmeventh()
993 inh_avail_mask |= riscv_has_ext(env, RVS) ? MHPMEVENTH_BIT_SINH : 0; in write_mhpmeventh()
994 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_mhpmeventh()
995 riscv_has_ext(env, RVU)) ? MHPMEVENTH_BIT_VUINH : 0; in write_mhpmeventh()
996 inh_avail_mask |= (riscv_has_ext(env, RVH) && in write_mhpmeventh()
997 riscv_has_ext(env, RVS)) ? MHPMEVENTH_BIT_VSINH : 0; in write_mhpmeventh()
1548 valid = riscv_has_ext(env, RVS); in legalize_mpp()
1551 valid = riscv_has_ext(env, RVU); in legalize_mpp()
1585 if (riscv_has_ext(env, RVF)) { in write_mstatus()
1588 if (riscv_has_ext(env, RVV)) { in write_mstatus()
1593 if (riscv_has_ext(env, RVH)) { in write_mstatus()
1628 uint64_t mask = riscv_has_ext(env, RVH) ? MSTATUS_MPV | MSTATUS_GVA : 0; in write_mstatush()
1755 if (riscv_has_ext(env, RVH)) { in rmw_mideleg64()
1806 if (!riscv_has_ext(env, RVH)) { in rmw_mie64()
2498 if (!riscv_has_ext(env, RVF)) { in write_mstateen0()
2582 if (!riscv_has_ext(env, RVF)) { in write_hstateen0()
2672 if (!riscv_has_ext(env, RVF)) { in write_sstateen0()
4261 if (riscv_has_ext(env, RVH)) { in write_mcontext()
4668 if (riscv_has_ext(env, RVH) && env->priv == PRV_S && in riscv_csrrw_check()