target/riscv/cpu_helper.c

1176  * @fault_pte_addr: If not NULL, this will be set to fault pte address
1177  *                  when a error occurs on pte address translation.
1319     target_ulong pte;
1367             pte = address_space_ldl(cs->as, pte_addr, attrs, &res);
1369             pte = address_space_ldq(cs->as, pte_addr, attrs, &res);
1377             ppn = pte >> PTE_PPN_SHIFT;
1379             if (pte & PTE_RESERVED(svrsw60t59b)) {
1381                               "addr: 0x%" HWADDR_PRIx " pte: 0x" TARGET_FMT_lx "\n",
1382                               __func__, pte_addr, pte);
1386             if (!pbmte && (pte & PTE_PBMT)) {
1390                               "addr: 0x%" HWADDR_PRIx " pte: 0x" TARGET_FMT_lx "\n",
1391                               __func__, pte_addr, pte);
1395             if (!riscv_cpu_cfg(env)->ext_svnapot && (pte & PTE_N)) {
1399                               "addr: 0x%" HWADDR_PRIx " pte: 0x" TARGET_FMT_lx "\n",
1400                               __func__, pte_addr, pte);
1404             ppn = (pte & (target_ulong)PTE_PPN_MASK) >> PTE_PPN_SHIFT;
1407         if (!(pte & PTE_V)) {
1412         if (pte & (PTE_R | PTE_W | PTE_X)) {
1416         if (pte & (PTE_D | PTE_A | PTE_U | PTE_ATTR)) {
1419                           "addr: 0x%" HWADDR_PRIx " pte: 0x" TARGET_FMT_lx "\n",
1420                           __func__, pte_addr, pte);
1427     /* No leaf pte at any translation level. */
1434                       "addr: 0x%" HWADDR_PRIx " pte: 0x" TARGET_FMT_lx "\n",
1435                       __func__, pte_addr, pte);
1438     if (!pbmte && (pte & PTE_PBMT)) {
1442                       "addr: 0x%" HWADDR_PRIx " pte: 0x" TARGET_FMT_lx "\n",
1443                       __func__, pte_addr, pte);
1447     target_ulong rwx = pte & (PTE_R | PTE_W | PTE_X);
1513     if (pte & PTE_U) {
1534     target_ulong updated_pte = pte;
1542     } else if (!(pte & PTE_A) ||
1543                (access_type == MMU_DATA_STORE && !(pte & PTE_D))) {
1548     if (updated_pte != pte && !is_debug) {
1569                 old_pte = qatomic_cmpxchg((uint32_t *)pte_pa, cpu_to_le32(pte), cpu_to_le32(updated_pte));
1572                 old_pte = qatomic_cmpxchg(pte_pa, cpu_to_le64(pte), cpu_to_le64(updated_pte));
1575             if (old_pte != pte) {
1578             pte = updated_pte;
1591     if (riscv_cpu_cfg(env)->ext_svnapot && (pte & PTE_N)) {
1608     if (access_type != MMU_DATA_STORE && !(pte & PTE_D)) {