target/riscv/cpu.c

111     ISA_EXT_DATA_ENTRY(zicsr, PRIV_VERSION_1_10_0, ext_zicsr),
112     ISA_EXT_DATA_ENTRY(zifencei, PRIV_VERSION_1_10_0, ext_zifencei),
113     ISA_EXT_DATA_ENTRY(zihintntl, PRIV_VERSION_1_10_0, ext_zihintntl),
114     ISA_EXT_DATA_ENTRY(zihintpause, PRIV_VERSION_1_10_0, ext_zihintpause),
159     ISA_EXT_DATA_ENTRY(zve32f, PRIV_VERSION_1_10_0, ext_zve32f),
160     ISA_EXT_DATA_ENTRY(zve32x, PRIV_VERSION_1_10_0, ext_zve32x),
161     ISA_EXT_DATA_ENTRY(zve64f, PRIV_VERSION_1_10_0, ext_zve64f),
162     ISA_EXT_DATA_ENTRY(zve64d, PRIV_VERSION_1_10_0, ext_zve64d),
163     ISA_EXT_DATA_ENTRY(zve64x, PRIV_VERSION_1_10_0, ext_zve64x),
501     env->priv_ver = PRIV_VERSION_1_10_0;  in rv64_sifive_u_cpu_init()
519     env->priv_ver = PRIV_VERSION_1_10_0;  in rv64_sifive_e_cpu_init()
660     env->priv_ver = PRIV_VERSION_1_10_0;  in rv32_sifive_u_cpu_init()
678     env->priv_ver = PRIV_VERSION_1_10_0;  in rv32_sifive_e_cpu_init()
712     env->priv_ver = PRIV_VERSION_1_10_0;  in rv32_imafcu_nommu_cpu_init()
1375     cpu->env.priv_ver = PRIV_VERSION_1_10_0;  in riscv_bare_cpu_init()
1799         priv_version = PRIV_VERSION_1_10_0;  in priv_spec_from_str()
1808     case PRIV_VERSION_1_10_0:  in priv_spec_to_str()