ppc/translate/fixedpoint-impl.c.inc

24 static bool do_ldst(DisasContext *ctx, int rt, int ra, TCGv displ, bool update,
29     if (update && (ra == 0 || (!store && ra == rt))) {
38         tcg_gen_qemu_st_tl(cpu_gpr[rt], ea, ctx->mem_idx, mop);
40         tcg_gen_qemu_ld_tl(cpu_gpr[rt], ea, ctx->mem_idx, mop);
51     return do_ldst(ctx, a->rt, a->ra, tcg_constant_tl(a->si), update, store, mop);
67     return do_ldst(ctx, a->rt, a->ra, cpu_gpr[a->rb], update, store, mop);
89     if (!store && unlikely(a->ra == a->rt)) {
98         lo = cpu_gpr[a->rt];
99         hi = cpu_gpr[a->rt + 1];
101         lo = cpu_gpr[a->rt + 1];
102         hi = cpu_gpr[a->rt];
343         tcg_gen_addi_tl(cpu_gpr[a->rt], cpu_gpr[a->ra], a->si);
345         tcg_gen_movi_tl(cpu_gpr[a->rt], a->si);
368     tcg_gen_movi_tl(cpu_gpr[a->rt], ctx->base.pc_next + (a->d << 16));
375     gen_op_arith_add(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra], cpu_gpr[a->rb],
383     gen_op_arith_add(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra],
392     gen_op_arith_add(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra], cpu_gpr[a->rb],
400     gen_op_arith_add(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra], const_val,
415     gen_op_arith_subf(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra],
423     gen_op_arith_subf(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra], cpu_gpr[a->rb],
431     gen_op_arith_subf(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra], const_val,
444     tcg_gen_muli_tl(cpu_gpr[a->rt], cpu_gpr[a->ra], a->si);
455     tcg_gen_mul_tl(cpu_gpr[a->rt], t0, t1);
457         gen_set_Rc0(ctx, cpu_gpr[a->rt]);
470     tcg_gen_mul_i64(cpu_gpr[a->rt], t0, t1);
471     tcg_gen_sextract_i64(t0, cpu_gpr[a->rt], 31, 1);
472     tcg_gen_sari_i64(t1, cpu_gpr[a->rt], 32);
474     tcg_gen_muls2_i32(cpu_gpr[a->rt], t1, cpu_gpr[a->ra], cpu_gpr[a->rb]);
475     tcg_gen_sari_i32(t0, cpu_gpr[a->rt], 31);
484         gen_set_Rc0(ctx, cpu_gpr[a->rt]);
498     tcg_gen_extu_i32_tl(cpu_gpr[a->rt], t1);
500         gen_set_Rc0(ctx, cpu_gpr[a->rt]);
510     gen_op_arith_divw(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra], cpu_gpr[a->rb],
519     helper(cpu_gpr[a->rt], tcg_env, cpu_gpr[a->ra], cpu_gpr[a->rb],
522         gen_set_Rc0(ctx, cpu_gpr[a->rt]);
535     gen_op_arith_modw(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra], cpu_gpr[a->rb],
547         gen_op_arith_subf(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra], zero,
550         tcg_gen_neg_tl(cpu_gpr[a->rt], cpu_gpr[a->ra]);
552             gen_set_Rc0(ctx, cpu_gpr[a->rt]);
564         tcg_gen_movi_i64(cpu_gpr[a->rt], -1);
568             gen_helper_DARN32(cpu_gpr[a->rt]);
571             gen_helper_DARN64(cpu_gpr[a->rt]);
584     tcg_gen_mul_tl(cpu_gpr[a->rt], cpu_gpr[a->ra], cpu_gpr[a->rb]);
586         gen_set_Rc0(ctx, cpu_gpr[a->rt]);
602     tcg_gen_mov_i64(cpu_gpr[a->rt], t0);
612         gen_set_Rc0(ctx, cpu_gpr[a->rt]);
624     helper(lo, cpu_gpr[a->rt], cpu_gpr[a->ra], cpu_gpr[a->rb]);
626         gen_set_Rc0(ctx, cpu_gpr[a->rt]);
689     gen_op_arith_divd(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra], cpu_gpr[a->rb],
702     gen_op_arith_modd(ctx, cpu_gpr[a->rt], cpu_gpr[a->ra], cpu_gpr[a->rb],
753     tcg_gen_movcond_tl(TCG_COND_NE, cpu_gpr[a->rt], t0, zr,
767     if (check_unconditional_trap(ctx, a->rt)) {
770     t0 = tcg_constant_i32(a->rt);
780     if (check_unconditional_trap(ctx, a->rt)) {
784     t1 = tcg_constant_i32(a->rt);
795     if (check_unconditional_trap(ctx, a->rt)) {
798     t0 = tcg_constant_i32(a->rt);
813     if (check_unconditional_trap(ctx, a->rt)) {
817     t1 = tcg_constant_i32(a->rt);
847         tcg_gen_negsetcond_tl(cond, cpu_gpr[a->rt], temp, zero);
849         tcg_gen_setcond_tl(cond, cpu_gpr[a->rt], temp, zero);
865     tcg_gen_andi_tl(cpu_gpr[a->ra], cpu_gpr[a->rt], shift ? a->ui << 16 : a->ui);
872     if (a->rt == a->ra && a->ui == 0) {
876     tcg_gen_ori_tl(cpu_gpr[a->ra], cpu_gpr[a->rt], shift ? a->ui << 16 : a->ui);
882     if (a->rt == a->ra && a->ui == 0) {
886     tcg_gen_xori_tl(cpu_gpr[a->ra], cpu_gpr[a->rt], shift ? a->ui << 16 : a->ui);
903     helper(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]);
913     if (a->rt != a->ra || a->rt != a->rb) {
914         if (a->rt != a->rb) {
915             tcg_gen_or_tl(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]);
917             tcg_gen_mov_tl(cpu_gpr[a->ra], cpu_gpr[a->rt]);
923         gen_set_Rc0(ctx, cpu_gpr[a->rt]);
925     } else if (a->rt != 0) { /* 0 is nop */
928         switch (a->rt) {
995     if (a->rt != a->rb) {
996         tcg_gen_xor_tl(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]);
1009     gen_helper_CMPB(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]);
1131     gen_helper_BPERMD(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]);
1143     gen_helper_CFUGED(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]);
1183     do_cntzdm(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb], false);
1195     do_cntzdm(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb], true);
1207     gen_helper_PDEPD(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]);
1219     gen_helper_PEXTD(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]);
1277     tcg_gen_muli_tl(cpu_gpr[a->rt], carryl, 6);
1316     ea = do_ea_calc(ctx, a->ra, tcg_constant_tl(a->rt));