Lines Matching +full:0 +full:x00004

27 #define SLB_ESID_ESID           0xFFFFFFFFF0000000ULL
28 #define SLB_ESID_V              0x0000000008000000ULL /* valid */
34 #define SLB_VSID_B              0xc000000000000000ULL
35 #define SLB_VSID_B_256M         0x0000000000000000ULL
36 #define SLB_VSID_B_1T           0x4000000000000000ULL
37 #define SLB_VSID_VSID           0x3FFFFFFFFFFFF000ULL
38 #define SLB_VSID_VRMA           (0x0001FFFFFF000000ULL | SLB_VSID_B_1T)
40 #define SLB_VSID_KS             0x0000000000000800ULL
41 #define SLB_VSID_KP             0x0000000000000400ULL
42 #define SLB_VSID_N              0x0000000000000200ULL /* no-execute */
43 #define SLB_VSID_L              0x0000000000000100ULL
45 #define SLB_VSID_C              0x0000000000000080ULL /* class */
46 #define SLB_VSID_LP             0x0000000000000030ULL
48 #define SLB_VSID_ATTR           0x0000000000000FFFULL
50 #define SLB_VSID_4K             0x0000000000000000ULL
51 #define SLB_VSID_64K            0x0000000000000110ULL
52 #define SLB_VSID_16M            0x0000000000000100ULL
53 #define SLB_VSID_16G            0x0000000000000120ULL
59 #define SDR_64_HTABORG         0x0FFFFFFFFFFC0000ULL
60 #define SDR_64_HTABSIZE        0x000000000000001FULL
62 #define PATE0_HTABORG           0x0FFFFFFFFFFC0000ULL
75 #define HPTE64_V_AVPN           0x3fffffffffffff80ULL
77 #define HPTE64_V_COMPARE(x, y)  (!(((x) ^ (y)) & 0xffffffffffffff83ULL))
78 #define HPTE64_V_BOLTED         0x0000000000000010ULL
79 #define HPTE64_V_LARGE          0x0000000000000004ULL
80 #define HPTE64_V_SECONDARY      0x0000000000000002ULL
81 #define HPTE64_V_VALID          0x0000000000000001ULL
83 #define HPTE64_R_PP0            0x8000000000000000ULL
84 #define HPTE64_R_TS             0x4000000000000000ULL
85 #define HPTE64_R_KEY_HI         0x3000000000000000ULL
87 #define HPTE64_R_RPN            0x0ffffffffffff000ULL
88 #define HPTE64_R_FLAGS          0x00000000000003ffULL
89 #define HPTE64_R_PP             0x0000000000000003ULL
90 #define HPTE64_R_N              0x0000000000000004ULL
91 #define HPTE64_R_G              0x0000000000000008ULL
92 #define HPTE64_R_M              0x0000000000000010ULL
93 #define HPTE64_R_I              0x0000000000000020ULL
94 #define HPTE64_R_W              0x0000000000000040ULL
95 #define HPTE64_R_WIMG           0x0000000000000078ULL
96 #define HPTE64_R_C              0x0000000000000080ULL
97 #define HPTE64_R_R              0x0000000000000100ULL
98 #define HPTE64_R_KEY_LO         0x0000000000000e00ULL
102 #define HPTE64_V_1TB_SEG        0x4000000000000000ULL
103 #define HPTE64_V_VRMA_MASK      0x4001ffffff000000ULL
111 #define HPTE64_V_COMMON_BITS    0x000fffffffffffffULL
142     uint32_t page_shift;  /* Page shift (or 0) */
148     uint32_t page_shift;  /* Base page shift of segment (or 0) */
154 #define PPC_HASH64_1TSEG        0x00001
155 #define PPC_HASH64_AMR          0x00002
156 #define PPC_HASH64_CI_LARGEPAGE 0x00004