Lines Matching refs:qemu_fprintf

7599     qemu_fprintf(f, "NIP " TARGET_FMT_lx "   LR " TARGET_FMT_lx " CTR "  in ppc_cpu_dump_state()
7603 qemu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET_FMT_lx " HF " in ppc_cpu_dump_state()
7609 qemu_fprintf(f, "TB %08" PRIu32 " %08" PRIu64 in ppc_cpu_dump_state()
7614 qemu_fprintf(f, "TB %08" PRIu32 " %08" PRIu64 "\n", cpu_ppc_load_tbu(env), in ppc_cpu_dump_state()
7619 qemu_fprintf(f, "GPR%02d", i); in ppc_cpu_dump_state()
7621 qemu_fprintf(f, " %016" PRIx64, ppc_dump_gpr(env, i)); in ppc_cpu_dump_state()
7623 qemu_fprintf(f, "\n"); in ppc_cpu_dump_state()
7626 qemu_fprintf(f, "CR "); in ppc_cpu_dump_state()
7628 qemu_fprintf(f, "%01x", env->crf[i]); in ppc_cpu_dump_state()
7629 qemu_fprintf(f, " ["); in ppc_cpu_dump_state()
7639 qemu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' '); in ppc_cpu_dump_state()
7641 qemu_fprintf(f, " ] RES %03x@" TARGET_FMT_lx "\n", in ppc_cpu_dump_state()
7647 qemu_fprintf(f, "FPR%02d", i); in ppc_cpu_dump_state()
7649 qemu_fprintf(f, " %016" PRIx64, *cpu_fpr_ptr(env, i)); in ppc_cpu_dump_state()
7651 qemu_fprintf(f, "\n"); in ppc_cpu_dump_state()
7654 qemu_fprintf(f, "FPSCR " TARGET_FMT_lx "\n", env->fpscr); in ppc_cpu_dump_state()
7658 qemu_fprintf(f, " SRR0 " TARGET_FMT_lx " SRR1 " TARGET_FMT_lx in ppc_cpu_dump_state()
7663 qemu_fprintf(f, "SPRG0 " TARGET_FMT_lx " SPRG1 " TARGET_FMT_lx in ppc_cpu_dump_state()
7668 qemu_fprintf(f, "SPRG4 " TARGET_FMT_lx " SPRG5 " TARGET_FMT_lx in ppc_cpu_dump_state()
7679 qemu_fprintf(f, "HSRR0 " TARGET_FMT_lx " HSRR1 " TARGET_FMT_lx "\n", in ppc_cpu_dump_state()
7684 qemu_fprintf(f, "CSRR0 " TARGET_FMT_lx " CSRR1 " TARGET_FMT_lx in ppc_cpu_dump_state()
7689 qemu_fprintf(f, " TCR " TARGET_FMT_lx " TSR " TARGET_FMT_lx in ppc_cpu_dump_state()
7694 qemu_fprintf(f, " PIR " TARGET_FMT_lx " DECAR " TARGET_FMT_lx in ppc_cpu_dump_state()
7699 qemu_fprintf(f, " MCSR " TARGET_FMT_lx " SPRG8 " TARGET_FMT_lx in ppc_cpu_dump_state()
7705 qemu_fprintf(f, " MCAR " TARGET_FMT_lx " PID1 " TARGET_FMT_lx in ppc_cpu_dump_state()
7716 qemu_fprintf(f, " TCR " TARGET_FMT_lx " TSR " TARGET_FMT_lx in ppc_cpu_dump_state()
7721 qemu_fprintf(f, " EVPR " TARGET_FMT_lx " SRR2 " TARGET_FMT_lx in ppc_cpu_dump_state()
7732 qemu_fprintf(f, " CFAR " TARGET_FMT_lx"\n", env->cfar); in ppc_cpu_dump_state()
7737 qemu_fprintf(f, " LPCR " TARGET_FMT_lx "\n", env->spr[SPR_LPCR]); in ppc_cpu_dump_state()
7751 qemu_fprintf(f, " SDR1 " TARGET_FMT_lx " ", env->spr[SPR_SDR1]); in ppc_cpu_dump_state()
7754 qemu_fprintf(f, " PTCR " TARGET_FMT_lx " ", env->spr[SPR_PTCR]); in ppc_cpu_dump_state()
7756 qemu_fprintf(f, " DAR " TARGET_FMT_lx " DSISR " TARGET_FMT_lx "\n", in ppc_cpu_dump_state()
7760 qemu_fprintf(f, " MAS0 " TARGET_FMT_lx " MAS1 " TARGET_FMT_lx in ppc_cpu_dump_state()
7765 qemu_fprintf(f, " MAS4 " TARGET_FMT_lx " MAS6 " TARGET_FMT_lx in ppc_cpu_dump_state()
7770 qemu_fprintf(f, "MMUCFG " TARGET_FMT_lx " TLB0CFG " TARGET_FMT_lx in ppc_cpu_dump_state()