Lines Matching refs:t
1191 void gen_load_gpr(TCGv t, int reg) in gen_load_gpr() argument
1195 tcg_gen_movi_tl(t, 0); in gen_load_gpr()
1197 tcg_gen_mov_tl(t, cpu_gpr[reg]); in gen_load_gpr()
1201 void gen_store_gpr(TCGv t, int reg) in gen_store_gpr() argument
1205 tcg_gen_mov_tl(cpu_gpr[reg], t); in gen_store_gpr()
1210 void gen_load_gpr_hi(TCGv_i64 t, int reg) in gen_load_gpr_hi() argument
1214 tcg_gen_movi_i64(t, 0); in gen_load_gpr_hi()
1216 tcg_gen_mov_i64(t, cpu_gpr_hi[reg]); in gen_load_gpr_hi()
1220 void gen_store_gpr_hi(TCGv_i64 t, int reg) in gen_store_gpr_hi() argument
1224 tcg_gen_mov_i64(cpu_gpr_hi[reg], t); in gen_store_gpr_hi()
1347 void gen_load_fpr32(DisasContext *ctx, TCGv_i32 t, int reg) in gen_load_fpr32() argument
1352 tcg_gen_extrl_i64_i32(t, fpu_f64[reg]); in gen_load_fpr32()
1355 void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg) in gen_store_fpr32() argument
1362 tcg_gen_extu_i32_i64(t64, t); in gen_store_fpr32()
1366 static void gen_load_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg) in gen_load_fpr32h() argument
1369 tcg_gen_extrh_i64_i32(t, fpu_f64[reg]); in gen_load_fpr32h()
1371 gen_load_fpr32(ctx, t, reg | 1); in gen_load_fpr32h()
1375 static void gen_store_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg) in gen_store_fpr32h() argument
1379 tcg_gen_extu_i32_i64(t64, t); in gen_store_fpr32h()
1382 gen_store_fpr32(ctx, t, reg | 1); in gen_store_fpr32h()
1386 void gen_load_fpr64(DisasContext *ctx, TCGv_i64 t, int reg) in gen_load_fpr64() argument
1389 tcg_gen_mov_i64(t, fpu_f64[reg]); in gen_load_fpr64()
1391 tcg_gen_concat32_i64(t, fpu_f64[reg & ~1], fpu_f64[reg | 1]); in gen_load_fpr64()
1395 void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg) in gen_store_fpr64() argument
1398 tcg_gen_mov_i64(fpu_f64[reg], t); in gen_store_fpr64()
1401 tcg_gen_deposit_i64(fpu_f64[reg & ~1], fpu_f64[reg & ~1], t, 0, 32); in gen_store_fpr64()
1403 tcg_gen_shri_i64(t0, t, 32); in gen_store_fpr64()