Lines Matching full:other
59 * because there might be other conditions that state that c should in mips_vpe_wake()
122 /* Not allowed to address other CPUs. */ in mips_cpu_map_tc()
258 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tcstatus() local
260 if (other_tc == other->current_tc) { in helper_mftc0_tcstatus()
261 return other->active_tc.CP0_TCStatus; in helper_mftc0_tcstatus()
263 return other->tcs[other_tc].CP0_TCStatus; in helper_mftc0_tcstatus()
275 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tcbind() local
277 if (other_tc == other->current_tc) { in helper_mftc0_tcbind()
278 return other->active_tc.CP0_TCBind; in helper_mftc0_tcbind()
280 return other->tcs[other_tc].CP0_TCBind; in helper_mftc0_tcbind()
292 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tcrestart() local
294 if (other_tc == other->current_tc) { in helper_mftc0_tcrestart()
295 return other->active_tc.PC; in helper_mftc0_tcrestart()
297 return other->tcs[other_tc].PC; in helper_mftc0_tcrestart()
309 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tchalt() local
311 if (other_tc == other->current_tc) { in helper_mftc0_tchalt()
312 return other->active_tc.CP0_TCHalt; in helper_mftc0_tchalt()
314 return other->tcs[other_tc].CP0_TCHalt; in helper_mftc0_tchalt()
326 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tccontext() local
328 if (other_tc == other->current_tc) { in helper_mftc0_tccontext()
329 return other->active_tc.CP0_TCContext; in helper_mftc0_tccontext()
331 return other->tcs[other_tc].CP0_TCContext; in helper_mftc0_tccontext()
343 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tcschedule() local
345 if (other_tc == other->current_tc) { in helper_mftc0_tcschedule()
346 return other->active_tc.CP0_TCSchedule; in helper_mftc0_tcschedule()
348 return other->tcs[other_tc].CP0_TCSchedule; in helper_mftc0_tcschedule()
360 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tcschefback() local
362 if (other_tc == other->current_tc) { in helper_mftc0_tcschefback()
363 return other->active_tc.CP0_TCScheFBack; in helper_mftc0_tcschefback()
365 return other->tcs[other_tc].CP0_TCScheFBack; in helper_mftc0_tcschefback()
377 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_entryhi() local
379 return other->CP0_EntryHi; in helper_mftc0_entryhi()
385 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_cause() local
387 return other->CP0_Cause; in helper_mftc0_cause()
393 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_status() local
395 return other->CP0_Status; in helper_mftc0_status()
442 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_debug() local
444 if (other_tc == other->current_tc) { in helper_mftc0_debug()
445 tcstatus = other->active_tc.CP0_Debug_tcstatus; in helper_mftc0_debug()
447 tcstatus = other->tcs[other_tc].CP0_Debug_tcstatus; in helper_mftc0_debug()
451 return (other->CP0_Debug & ~((1 << CP0DB_SSt) | (1 << CP0DB_Halt))) | in helper_mftc0_debug()
556 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_vpecontrol() local
562 newval = (other->CP0_VPEControl & ~mask) | (arg1 & mask); in helper_mttc0_vpecontrol()
566 other->CP0_VPEControl = newval; in helper_mttc0_vpecontrol()
572 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_vpecontrol() local
574 return other->CP0_VPEControl; in helper_mftc0_vpecontrol()
580 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_vpeconf0() local
582 return other->CP0_VPEConf0; in helper_mftc0_vpeconf0()
606 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_vpeconf0() local
611 newval = (other->CP0_VPEConf0 & ~mask) | (arg1 & mask); in helper_mttc0_vpeconf0()
614 other->CP0_VPEConf0 = newval; in helper_mttc0_vpeconf0()
680 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tcstatus() local
682 if (other_tc == other->current_tc) { in helper_mttc0_tcstatus()
683 other->active_tc.CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
685 other->tcs[other_tc].CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
687 sync_c0_tcstatus(other, other_tc, arg1); in helper_mttc0_tcstatus()
707 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tcbind() local
709 if (other->mvp->CP0_MVPControl & (1 << CP0MVPCo_VPC)) { in helper_mttc0_tcbind()
712 if (other_tc == other->current_tc) { in helper_mttc0_tcbind()
713 newval = (other->active_tc.CP0_TCBind & ~mask) | (arg1 & mask); in helper_mttc0_tcbind()
714 other->active_tc.CP0_TCBind = newval; in helper_mttc0_tcbind()
716 newval = (other->tcs[other_tc].CP0_TCBind & ~mask) | (arg1 & mask); in helper_mttc0_tcbind()
717 other->tcs[other_tc].CP0_TCBind = newval; in helper_mttc0_tcbind()
733 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tcrestart() local
735 if (other_tc == other->current_tc) { in helper_mttc0_tcrestart()
736 other->active_tc.PC = arg1; in helper_mttc0_tcrestart()
737 other->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mttc0_tcrestart()
738 other->CP0_LLAddr = 0; in helper_mttc0_tcrestart()
739 other->lladdr = 0; in helper_mttc0_tcrestart()
742 other->tcs[other_tc].PC = arg1; in helper_mttc0_tcrestart()
743 other->tcs[other_tc].CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mttc0_tcrestart()
744 other->CP0_LLAddr = 0; in helper_mttc0_tcrestart()
745 other->lladdr = 0; in helper_mttc0_tcrestart()
767 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tchalt() local
768 MIPSCPU *other_cpu = env_archcpu(other); in helper_mttc0_tchalt()
772 if (other_tc == other->current_tc) { in helper_mttc0_tchalt()
773 other->active_tc.CP0_TCHalt = arg1; in helper_mttc0_tchalt()
775 other->tcs[other_tc].CP0_TCHalt = arg1; in helper_mttc0_tchalt()
793 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tccontext() local
795 if (other_tc == other->current_tc) { in helper_mttc0_tccontext()
796 other->active_tc.CP0_TCContext = arg1; in helper_mttc0_tccontext()
798 other->tcs[other_tc].CP0_TCContext = arg1; in helper_mttc0_tccontext()
810 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tcschedule() local
812 if (other_tc == other->current_tc) { in helper_mttc0_tcschedule()
813 other->active_tc.CP0_TCSchedule = arg1; in helper_mttc0_tcschedule()
815 other->tcs[other_tc].CP0_TCSchedule = arg1; in helper_mttc0_tcschedule()
827 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tcschefback() local
829 if (other_tc == other->current_tc) { in helper_mttc0_tcschefback()
830 other->active_tc.CP0_TCScheFBack = arg1; in helper_mttc0_tcschefback()
832 other->tcs[other_tc].CP0_TCScheFBack = arg1; in helper_mttc0_tcschefback()
1106 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_entryhi() local
1108 other->CP0_EntryHi = arg1; in helper_mttc0_entryhi()
1109 sync_c0_entryhi(other, other_tc); in helper_mttc0_entryhi()
1154 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_status() local
1156 other->CP0_Status = (other->CP0_Status & ~mask) | (arg1 & mask); in helper_mttc0_status()
1157 sync_c0_status(env, other, other_tc); in helper_mttc0_status()
1179 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_cause() local
1181 cpu_mips_store_cause(other, arg1); in helper_mttc0_cause()
1187 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_epc() local
1189 return other->CP0_EPC; in helper_mftc0_epc()
1195 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_ebase() local
1197 return other->CP0_EBase; in helper_mftc0_ebase()
1212 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_ebase() local
1217 other->CP0_EBase = (other->CP0_EBase & ~mask) | (arg1 & mask); in helper_mttc0_ebase()
1223 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_configx() local
1226 case 0: return other->CP0_Config0; in helper_mftc0_configx()
1227 case 1: return other->CP0_Config1; in helper_mftc0_configx()
1228 case 2: return other->CP0_Config2; in helper_mftc0_configx()
1229 case 3: return other->CP0_Config3; in helper_mftc0_configx()
1231 case 6: return other->CP0_Config6; in helper_mftc0_configx()
1232 case 7: return other->CP0_Config7; in helper_mftc0_configx()
1308 * Other than the all ones, if the value written is not supported, in helper_mtc0_maari()
1364 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_debug() local
1367 if (other_tc == other->current_tc) { in helper_mttc0_debug()
1368 other->active_tc.CP0_Debug_tcstatus = val; in helper_mttc0_debug()
1370 other->tcs[other_tc].CP0_Debug_tcstatus = val; in helper_mttc0_debug()
1372 other->CP0_Debug = (other->CP0_Debug & in helper_mttc0_debug()
1430 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftgpr() local
1432 if (other_tc == other->current_tc) { in helper_mftgpr()
1433 return other->active_tc.gpr[sel]; in helper_mftgpr()
1435 return other->tcs[other_tc].gpr[sel]; in helper_mftgpr()
1442 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftlo() local
1444 if (other_tc == other->current_tc) { in helper_mftlo()
1445 return other->active_tc.LO[sel]; in helper_mftlo()
1447 return other->tcs[other_tc].LO[sel]; in helper_mftlo()
1454 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mfthi() local
1456 if (other_tc == other->current_tc) { in helper_mfthi()
1457 return other->active_tc.HI[sel]; in helper_mfthi()
1459 return other->tcs[other_tc].HI[sel]; in helper_mfthi()
1466 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftacx() local
1468 if (other_tc == other->current_tc) { in helper_mftacx()
1469 return other->active_tc.ACX[sel]; in helper_mftacx()
1471 return other->tcs[other_tc].ACX[sel]; in helper_mftacx()
1478 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftdsp() local
1480 if (other_tc == other->current_tc) { in helper_mftdsp()
1481 return other->active_tc.DSPControl; in helper_mftdsp()
1483 return other->tcs[other_tc].DSPControl; in helper_mftdsp()
1490 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttgpr() local
1492 if (other_tc == other->current_tc) { in helper_mttgpr()
1493 other->active_tc.gpr[sel] = arg1; in helper_mttgpr()
1495 other->tcs[other_tc].gpr[sel] = arg1; in helper_mttgpr()
1502 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttlo() local
1504 if (other_tc == other->current_tc) { in helper_mttlo()
1505 other->active_tc.LO[sel] = arg1; in helper_mttlo()
1507 other->tcs[other_tc].LO[sel] = arg1; in helper_mttlo()
1514 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mtthi() local
1516 if (other_tc == other->current_tc) { in helper_mtthi()
1517 other->active_tc.HI[sel] = arg1; in helper_mtthi()
1519 other->tcs[other_tc].HI[sel] = arg1; in helper_mtthi()
1526 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttacx() local
1528 if (other_tc == other->current_tc) { in helper_mttacx()
1529 other->active_tc.ACX[sel] = arg1; in helper_mttacx()
1531 other->tcs[other_tc].ACX[sel] = arg1; in helper_mttacx()
1538 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttdsp() local
1540 if (other_tc == other->current_tc) { in helper_mttdsp()
1541 other->active_tc.DSPControl = arg1; in helper_mttdsp()
1543 other->tcs[other_tc].DSPControl = arg1; in helper_mttdsp()