Lines Matching full:other
58 * because there might be other conditions that state that c should in mips_vpe_wake()
121 /* Not allowed to address other CPUs. */ in mips_cpu_map_tc()
257 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tcstatus() local
259 if (other_tc == other->current_tc) { in helper_mftc0_tcstatus()
260 return other->active_tc.CP0_TCStatus; in helper_mftc0_tcstatus()
262 return other->tcs[other_tc].CP0_TCStatus; in helper_mftc0_tcstatus()
274 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tcbind() local
276 if (other_tc == other->current_tc) { in helper_mftc0_tcbind()
277 return other->active_tc.CP0_TCBind; in helper_mftc0_tcbind()
279 return other->tcs[other_tc].CP0_TCBind; in helper_mftc0_tcbind()
291 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tcrestart() local
293 if (other_tc == other->current_tc) { in helper_mftc0_tcrestart()
294 return other->active_tc.PC; in helper_mftc0_tcrestart()
296 return other->tcs[other_tc].PC; in helper_mftc0_tcrestart()
308 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tchalt() local
310 if (other_tc == other->current_tc) { in helper_mftc0_tchalt()
311 return other->active_tc.CP0_TCHalt; in helper_mftc0_tchalt()
313 return other->tcs[other_tc].CP0_TCHalt; in helper_mftc0_tchalt()
325 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tccontext() local
327 if (other_tc == other->current_tc) { in helper_mftc0_tccontext()
328 return other->active_tc.CP0_TCContext; in helper_mftc0_tccontext()
330 return other->tcs[other_tc].CP0_TCContext; in helper_mftc0_tccontext()
342 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tcschedule() local
344 if (other_tc == other->current_tc) { in helper_mftc0_tcschedule()
345 return other->active_tc.CP0_TCSchedule; in helper_mftc0_tcschedule()
347 return other->tcs[other_tc].CP0_TCSchedule; in helper_mftc0_tcschedule()
359 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_tcschefback() local
361 if (other_tc == other->current_tc) { in helper_mftc0_tcschefback()
362 return other->active_tc.CP0_TCScheFBack; in helper_mftc0_tcschefback()
364 return other->tcs[other_tc].CP0_TCScheFBack; in helper_mftc0_tcschefback()
376 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_entryhi() local
378 return other->CP0_EntryHi; in helper_mftc0_entryhi()
384 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_cause() local
386 return other->CP0_Cause; in helper_mftc0_cause()
392 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_status() local
394 return other->CP0_Status; in helper_mftc0_status()
441 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_debug() local
443 if (other_tc == other->current_tc) { in helper_mftc0_debug()
444 tcstatus = other->active_tc.CP0_Debug_tcstatus; in helper_mftc0_debug()
446 tcstatus = other->tcs[other_tc].CP0_Debug_tcstatus; in helper_mftc0_debug()
450 return (other->CP0_Debug & ~((1 << CP0DB_SSt) | (1 << CP0DB_Halt))) | in helper_mftc0_debug()
555 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_vpecontrol() local
561 newval = (other->CP0_VPEControl & ~mask) | (arg1 & mask); in helper_mttc0_vpecontrol()
565 other->CP0_VPEControl = newval; in helper_mttc0_vpecontrol()
571 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_vpecontrol() local
573 return other->CP0_VPEControl; in helper_mftc0_vpecontrol()
579 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_vpeconf0() local
581 return other->CP0_VPEConf0; in helper_mftc0_vpeconf0()
605 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_vpeconf0() local
610 newval = (other->CP0_VPEConf0 & ~mask) | (arg1 & mask); in helper_mttc0_vpeconf0()
613 other->CP0_VPEConf0 = newval; in helper_mttc0_vpeconf0()
679 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tcstatus() local
681 if (other_tc == other->current_tc) { in helper_mttc0_tcstatus()
682 other->active_tc.CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
684 other->tcs[other_tc].CP0_TCStatus = arg1; in helper_mttc0_tcstatus()
686 sync_c0_tcstatus(other, other_tc, arg1); in helper_mttc0_tcstatus()
706 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tcbind() local
708 if (other->mvp->CP0_MVPControl & (1 << CP0MVPCo_VPC)) { in helper_mttc0_tcbind()
711 if (other_tc == other->current_tc) { in helper_mttc0_tcbind()
712 newval = (other->active_tc.CP0_TCBind & ~mask) | (arg1 & mask); in helper_mttc0_tcbind()
713 other->active_tc.CP0_TCBind = newval; in helper_mttc0_tcbind()
715 newval = (other->tcs[other_tc].CP0_TCBind & ~mask) | (arg1 & mask); in helper_mttc0_tcbind()
716 other->tcs[other_tc].CP0_TCBind = newval; in helper_mttc0_tcbind()
732 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tcrestart() local
734 if (other_tc == other->current_tc) { in helper_mttc0_tcrestart()
735 other->active_tc.PC = arg1; in helper_mttc0_tcrestart()
736 other->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mttc0_tcrestart()
737 other->CP0_LLAddr = 0; in helper_mttc0_tcrestart()
738 other->lladdr = 0; in helper_mttc0_tcrestart()
741 other->tcs[other_tc].PC = arg1; in helper_mttc0_tcrestart()
742 other->tcs[other_tc].CP0_TCStatus &= ~(1 << CP0TCSt_TDS); in helper_mttc0_tcrestart()
743 other->CP0_LLAddr = 0; in helper_mttc0_tcrestart()
744 other->lladdr = 0; in helper_mttc0_tcrestart()
766 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tchalt() local
767 MIPSCPU *other_cpu = env_archcpu(other); in helper_mttc0_tchalt()
771 if (other_tc == other->current_tc) { in helper_mttc0_tchalt()
772 other->active_tc.CP0_TCHalt = arg1; in helper_mttc0_tchalt()
774 other->tcs[other_tc].CP0_TCHalt = arg1; in helper_mttc0_tchalt()
792 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tccontext() local
794 if (other_tc == other->current_tc) { in helper_mttc0_tccontext()
795 other->active_tc.CP0_TCContext = arg1; in helper_mttc0_tccontext()
797 other->tcs[other_tc].CP0_TCContext = arg1; in helper_mttc0_tccontext()
809 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tcschedule() local
811 if (other_tc == other->current_tc) { in helper_mttc0_tcschedule()
812 other->active_tc.CP0_TCSchedule = arg1; in helper_mttc0_tcschedule()
814 other->tcs[other_tc].CP0_TCSchedule = arg1; in helper_mttc0_tcschedule()
826 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_tcschefback() local
828 if (other_tc == other->current_tc) { in helper_mttc0_tcschefback()
829 other->active_tc.CP0_TCScheFBack = arg1; in helper_mttc0_tcschefback()
831 other->tcs[other_tc].CP0_TCScheFBack = arg1; in helper_mttc0_tcschefback()
1117 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_entryhi() local
1119 other->CP0_EntryHi = arg1; in helper_mttc0_entryhi()
1120 sync_c0_entryhi(other, other_tc); in helper_mttc0_entryhi()
1165 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_status() local
1167 other->CP0_Status = (other->CP0_Status & ~mask) | (arg1 & mask); in helper_mttc0_status()
1168 sync_c0_status(env, other, other_tc); in helper_mttc0_status()
1190 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_cause() local
1192 cpu_mips_store_cause(other, arg1); in helper_mttc0_cause()
1198 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_epc() local
1200 return other->CP0_EPC; in helper_mftc0_epc()
1206 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_ebase() local
1208 return other->CP0_EBase; in helper_mftc0_ebase()
1223 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_ebase() local
1228 other->CP0_EBase = (other->CP0_EBase & ~mask) | (arg1 & mask); in helper_mttc0_ebase()
1234 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftc0_configx() local
1237 case 0: return other->CP0_Config0; in helper_mftc0_configx()
1238 case 1: return other->CP0_Config1; in helper_mftc0_configx()
1239 case 2: return other->CP0_Config2; in helper_mftc0_configx()
1240 case 3: return other->CP0_Config3; in helper_mftc0_configx()
1242 case 6: return other->CP0_Config6; in helper_mftc0_configx()
1243 case 7: return other->CP0_Config7; in helper_mftc0_configx()
1319 * Other than the all ones, if the value written is not supported, in helper_mtc0_maari()
1375 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttc0_debug() local
1378 if (other_tc == other->current_tc) { in helper_mttc0_debug()
1379 other->active_tc.CP0_Debug_tcstatus = val; in helper_mttc0_debug()
1381 other->tcs[other_tc].CP0_Debug_tcstatus = val; in helper_mttc0_debug()
1383 other->CP0_Debug = (other->CP0_Debug & in helper_mttc0_debug()
1441 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftgpr() local
1443 if (other_tc == other->current_tc) { in helper_mftgpr()
1444 return other->active_tc.gpr[sel]; in helper_mftgpr()
1446 return other->tcs[other_tc].gpr[sel]; in helper_mftgpr()
1453 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftlo() local
1455 if (other_tc == other->current_tc) { in helper_mftlo()
1456 return other->active_tc.LO[sel]; in helper_mftlo()
1458 return other->tcs[other_tc].LO[sel]; in helper_mftlo()
1465 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mfthi() local
1467 if (other_tc == other->current_tc) { in helper_mfthi()
1468 return other->active_tc.HI[sel]; in helper_mfthi()
1470 return other->tcs[other_tc].HI[sel]; in helper_mfthi()
1477 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftacx() local
1479 if (other_tc == other->current_tc) { in helper_mftacx()
1480 return other->active_tc.ACX[sel]; in helper_mftacx()
1482 return other->tcs[other_tc].ACX[sel]; in helper_mftacx()
1489 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mftdsp() local
1491 if (other_tc == other->current_tc) { in helper_mftdsp()
1492 return other->active_tc.DSPControl; in helper_mftdsp()
1494 return other->tcs[other_tc].DSPControl; in helper_mftdsp()
1501 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttgpr() local
1503 if (other_tc == other->current_tc) { in helper_mttgpr()
1504 other->active_tc.gpr[sel] = arg1; in helper_mttgpr()
1506 other->tcs[other_tc].gpr[sel] = arg1; in helper_mttgpr()
1513 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttlo() local
1515 if (other_tc == other->current_tc) { in helper_mttlo()
1516 other->active_tc.LO[sel] = arg1; in helper_mttlo()
1518 other->tcs[other_tc].LO[sel] = arg1; in helper_mttlo()
1525 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mtthi() local
1527 if (other_tc == other->current_tc) { in helper_mtthi()
1528 other->active_tc.HI[sel] = arg1; in helper_mtthi()
1530 other->tcs[other_tc].HI[sel] = arg1; in helper_mtthi()
1537 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttacx() local
1539 if (other_tc == other->current_tc) { in helper_mttacx()
1540 other->active_tc.ACX[sel] = arg1; in helper_mttacx()
1542 other->tcs[other_tc].ACX[sel] = arg1; in helper_mttacx()
1549 CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); in helper_mttdsp() local
1551 if (other_tc == other->current_tc) { in helper_mttdsp()
1552 other->active_tc.DSPControl = arg1; in helper_mttdsp()
1554 other->tcs[other_tc].DSPControl = arg1; in helper_mttdsp()