Lines Matching +full:cs +full:- +full:0
8 * Copyright (C) 2012-2014 Imagination Technologies Ltd.
19 #include "qemu/error-report.h"
20 #include "qemu/main-loop.h"
28 #define DEBUG_KVM 0
31 do { if (DEBUG_KVM) { fprintf(stderr, fmt, ## __VA_ARGS__); } } while (0)
42 unsigned long kvm_arch_vcpu_id(CPUState *cs) in kvm_arch_vcpu_id() argument
44 return cs->cpu_index; in kvm_arch_vcpu_id()
56 return 0; in kvm_arch_init()
61 return 0; in kvm_arch_irqchip_create()
64 int kvm_arch_init_vcpu(CPUState *cs) in kvm_arch_init_vcpu() argument
66 CPUMIPSState *env = cpu_env(cs); in kvm_arch_init_vcpu()
67 int ret = 0; in kvm_arch_init_vcpu()
69 qemu_add_vm_change_state_handler(kvm_mips_update_state, cs); in kvm_arch_init_vcpu()
71 if (kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_arch_init_vcpu()
72 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_MIPS_FPU, 0, 0); in kvm_arch_init_vcpu()
73 if (ret < 0) { in kvm_arch_init_vcpu()
75 kvm_mips_fpu_cap = 0; in kvm_arch_init_vcpu()
76 ret = 0; in kvm_arch_init_vcpu()
81 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_MIPS_MSA, 0, 0); in kvm_arch_init_vcpu()
82 if (ret < 0) { in kvm_arch_init_vcpu()
84 kvm_mips_msa_cap = 0; in kvm_arch_init_vcpu()
85 ret = 0; in kvm_arch_init_vcpu()
93 int kvm_arch_destroy_vcpu(CPUState *cs) in kvm_arch_destroy_vcpu() argument
95 return 0; in kvm_arch_destroy_vcpu()
100 CPUMIPSState *env = &cpu->env; in kvm_mips_reset_vcpu()
102 if (!kvm_mips_fpu_cap && env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_reset_vcpu()
104 env->CP0_Config1 &= ~(1 << CP0C1_FP); in kvm_mips_reset_vcpu()
108 env->CP0_Config3 &= ~(1 << CP0C3_MSAP); in kvm_mips_reset_vcpu()
114 int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) in kvm_arch_insert_sw_breakpoint() argument
117 return 0; in kvm_arch_insert_sw_breakpoint()
120 int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) in kvm_arch_remove_sw_breakpoint() argument
123 return 0; in kvm_arch_remove_sw_breakpoint()
128 CPUMIPSState *env = &cpu->env; in cpu_mips_io_interrupts_pending()
130 return env->CP0_Cause & (0x1 << (2 + CP0Ca_IP)); in cpu_mips_io_interrupts_pending()
134 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) in kvm_arch_pre_run() argument
136 MIPSCPU *cpu = MIPS_CPU(cs); in kvm_arch_pre_run()
142 if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && in kvm_arch_pre_run()
144 intr.cpu = -1; in kvm_arch_pre_run()
146 r = kvm_vcpu_ioctl(cs, KVM_INTERRUPT, &intr); in kvm_arch_pre_run()
147 if (r < 0) { in kvm_arch_pre_run()
149 __func__, cs->cpu_index, intr.irq); in kvm_arch_pre_run()
156 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) in kvm_arch_post_run() argument
161 int kvm_arch_process_async_events(CPUState *cs) in kvm_arch_process_async_events() argument
163 return cs->halted; in kvm_arch_process_async_events()
166 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) in kvm_arch_handle_exit() argument
171 switch (run->exit_reason) { in kvm_arch_handle_exit()
174 __func__, run->exit_reason); in kvm_arch_handle_exit()
175 ret = -1; in kvm_arch_handle_exit()
182 bool kvm_arch_stop_on_emulation_error(CPUState *cs) in kvm_arch_stop_on_emulation_error() argument
194 CPUState *cs = CPU(cpu); in kvm_mips_set_interrupt() local
199 intr.cpu = -1; in kvm_mips_set_interrupt()
204 intr.irq = -irq; in kvm_mips_set_interrupt()
207 kvm_vcpu_ioctl(cs, KVM_INTERRUPT, &intr); in kvm_mips_set_interrupt()
209 return 0; in kvm_mips_set_interrupt()
214 CPUState *cs = current_cpu; in kvm_mips_set_ipi_interrupt() local
220 intr.cpu = dest_cs->cpu_index; in kvm_mips_set_ipi_interrupt()
225 intr.irq = -irq; in kvm_mips_set_ipi_interrupt()
230 kvm_vcpu_ioctl(cs, KVM_INTERRUPT, &intr); in kvm_mips_set_ipi_interrupt()
232 return 0; in kvm_mips_set_ipi_interrupt()
241 #define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0)
242 #define KVM_REG_MIPS_CP0_RANDOM MIPS_CP0_32(1, 0)
243 #define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0)
245 #define KVM_REG_MIPS_CP0_PAGEMASK MIPS_CP0_32(5, 0)
250 #define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0)
252 #define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0)
253 #define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0)
254 #define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0)
255 #define KVM_REG_MIPS_CP0_ENTRYHI MIPS_CP0_64(10, 0)
256 #define KVM_REG_MIPS_CP0_COMPARE MIPS_CP0_32(11, 0)
257 #define KVM_REG_MIPS_CP0_STATUS MIPS_CP0_32(12, 0)
258 #define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0)
259 #define KVM_REG_MIPS_CP0_EPC MIPS_CP0_64(14, 0)
260 #define KVM_REG_MIPS_CP0_PRID MIPS_CP0_32(15, 0)
262 #define KVM_REG_MIPS_CP0_CONFIG MIPS_CP0_32(16, 0)
269 #define KVM_REG_MIPS_CP0_XCONTEXT MIPS_CP0_64(20, 0)
270 #define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
278 static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id, in kvm_mips_put_one_reg() argument
286 return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg); in kvm_mips_put_one_reg()
289 static inline int kvm_mips_put_one_ureg(CPUState *cs, uint64_t reg_id, in kvm_mips_put_one_ureg() argument
297 return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg); in kvm_mips_put_one_ureg()
300 static inline int kvm_mips_put_one_ulreg(CPUState *cs, uint64_t reg_id, in kvm_mips_put_one_ulreg() argument
309 return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg); in kvm_mips_put_one_ulreg()
312 static inline int kvm_mips_put_one_reg64(CPUState *cs, uint64_t reg_id, in kvm_mips_put_one_reg64() argument
320 return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg); in kvm_mips_put_one_reg64()
323 static inline int kvm_mips_put_one_ureg64(CPUState *cs, uint64_t reg_id, in kvm_mips_put_one_ureg64() argument
331 return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &cp0reg); in kvm_mips_put_one_ureg64()
334 static inline int kvm_mips_get_one_reg(CPUState *cs, uint64_t reg_id, in kvm_mips_get_one_reg() argument
342 return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg); in kvm_mips_get_one_reg()
345 static inline int kvm_mips_get_one_ureg(CPUState *cs, uint64_t reg_id, in kvm_mips_get_one_ureg() argument
353 return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg); in kvm_mips_get_one_ureg()
356 static inline int kvm_mips_get_one_ulreg(CPUState *cs, uint64_t reg_id, in kvm_mips_get_one_ulreg() argument
360 uint64_t val64 = 0; in kvm_mips_get_one_ulreg()
366 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg); in kvm_mips_get_one_ulreg()
367 if (ret >= 0) { in kvm_mips_get_one_ulreg()
373 static inline int kvm_mips_get_one_reg64(CPUState *cs, uint64_t reg_id, in kvm_mips_get_one_reg64() argument
381 return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg); in kvm_mips_get_one_reg64()
384 static inline int kvm_mips_get_one_ureg64(CPUState *cs, uint64_t reg_id, in kvm_mips_get_one_ureg64() argument
392 return kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &cp0reg); in kvm_mips_get_one_ureg64()
407 (0x3fU << CP0C6_KPOS) | \
430 static inline int kvm_mips_change_one_reg(CPUState *cs, uint64_t reg_id, in kvm_mips_change_one_reg() argument
436 err = kvm_mips_get_one_reg(cs, reg_id, &tmp); in kvm_mips_change_one_reg()
437 if (err < 0) { in kvm_mips_change_one_reg()
444 return 0; in kvm_mips_change_one_reg()
448 return kvm_mips_put_one_reg(cs, reg_id, &tmp); in kvm_mips_change_one_reg()
460 static int kvm_mips_save_count(CPUState *cs) in kvm_mips_save_count() argument
462 CPUMIPSState *env = cpu_env(cs); in kvm_mips_save_count()
464 int err, ret = 0; in kvm_mips_save_count()
467 err = kvm_mips_get_one_ureg64(cs, KVM_REG_MIPS_COUNT_CTL, &count_ctl); in kvm_mips_save_count()
468 if (err < 0) { in kvm_mips_save_count()
473 err = kvm_mips_put_one_ureg64(cs, KVM_REG_MIPS_COUNT_CTL, &count_ctl); in kvm_mips_save_count()
474 if (err < 0) { in kvm_mips_save_count()
481 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CAUSE, &env->CP0_Cause); in kvm_mips_save_count()
482 if (err < 0) { in kvm_mips_save_count()
488 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_COUNT, &env->CP0_Count); in kvm_mips_save_count()
489 if (err < 0) { in kvm_mips_save_count()
501 static int kvm_mips_restore_count(CPUState *cs) in kvm_mips_restore_count() argument
503 CPUMIPSState *env = cpu_env(cs); in kvm_mips_restore_count()
505 int err_dc, err, ret = 0; in kvm_mips_restore_count()
508 err_dc = kvm_mips_get_one_ureg64(cs, KVM_REG_MIPS_COUNT_CTL, &count_ctl); in kvm_mips_restore_count()
509 if (err_dc < 0) { in kvm_mips_restore_count()
515 err = kvm_mips_put_one_ureg64(cs, KVM_REG_MIPS_COUNT_CTL, &count_ctl); in kvm_mips_restore_count()
516 if (err < 0) { in kvm_mips_restore_count()
523 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_CAUSE, &env->CP0_Cause); in kvm_mips_restore_count()
524 if (err < 0) { in kvm_mips_restore_count()
530 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_COUNT, &env->CP0_Count); in kvm_mips_restore_count()
531 if (err < 0) { in kvm_mips_restore_count()
537 if (err_dc >= 0) { in kvm_mips_restore_count()
539 err = kvm_mips_put_one_ureg64(cs, KVM_REG_MIPS_COUNT_CTL, &count_ctl); in kvm_mips_restore_count()
540 if (err < 0) { in kvm_mips_restore_count()
541 DPRINTF("%s: Failed to set COUNT_CTL.DC=0 (%d)\n", __func__, err); in kvm_mips_restore_count()
554 CPUState *cs = opaque; in kvm_mips_update_state() local
563 if (!cs->vcpu_dirty) { in kvm_mips_update_state()
564 ret = kvm_mips_save_count(cs); in kvm_mips_update_state()
565 if (ret < 0) { in kvm_mips_update_state()
572 ret = kvm_mips_put_one_ureg64(cs, KVM_REG_MIPS_COUNT_RESUME, in kvm_mips_update_state()
574 if (ret < 0) { in kvm_mips_update_state()
579 if (!cs->vcpu_dirty) { in kvm_mips_update_state()
580 ret = kvm_mips_restore_count(cs); in kvm_mips_update_state()
581 if (ret < 0) { in kvm_mips_update_state()
588 static int kvm_mips_put_fpu_registers(CPUState *cs, int level) in kvm_mips_put_fpu_registers() argument
590 CPUMIPSState *env = cpu_env(cs); in kvm_mips_put_fpu_registers()
591 int err, ret = 0; in kvm_mips_put_fpu_registers()
595 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_put_fpu_registers()
598 err = kvm_mips_put_one_ureg(cs, KVM_REG_MIPS_FCR_IR, in kvm_mips_put_fpu_registers()
599 &env->active_fpu.fcr0); in kvm_mips_put_fpu_registers()
600 if (err < 0) { in kvm_mips_put_fpu_registers()
605 err = kvm_mips_put_one_ureg(cs, KVM_REG_MIPS_FCR_CSR, in kvm_mips_put_fpu_registers()
606 &env->active_fpu.fcr31); in kvm_mips_put_fpu_registers()
607 if (err < 0) { in kvm_mips_put_fpu_registers()
618 for (i = 0; i < 32; ++i) { in kvm_mips_put_fpu_registers()
619 if (env->CP0_Status & (1 << CP0St_FR)) { in kvm_mips_put_fpu_registers()
620 err = kvm_mips_put_one_ureg64(cs, KVM_REG_MIPS_FPR_64(i), in kvm_mips_put_fpu_registers()
621 &env->active_fpu.fpr[i].d); in kvm_mips_put_fpu_registers()
623 err = kvm_mips_get_one_ureg(cs, KVM_REG_MIPS_FPR_32(i), in kvm_mips_put_fpu_registers()
624 &env->active_fpu.fpr[i].w[FP_ENDIAN_IDX]); in kvm_mips_put_fpu_registers()
626 if (err < 0) { in kvm_mips_put_fpu_registers()
638 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_MSA_IR, in kvm_mips_put_fpu_registers()
639 &env->msair); in kvm_mips_put_fpu_registers()
640 if (err < 0) { in kvm_mips_put_fpu_registers()
645 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_MSA_CSR, in kvm_mips_put_fpu_registers()
646 &env->active_tc.msacsr); in kvm_mips_put_fpu_registers()
647 if (err < 0) { in kvm_mips_put_fpu_registers()
653 for (i = 0; i < 32; ++i) { in kvm_mips_put_fpu_registers()
655 err = kvm_mips_put_one_reg64(cs, KVM_REG_MIPS_VEC_128(i), in kvm_mips_put_fpu_registers()
656 env->active_fpu.fpr[i].wr.d); in kvm_mips_put_fpu_registers()
657 if (err < 0) { in kvm_mips_put_fpu_registers()
667 static int kvm_mips_get_fpu_registers(CPUState *cs) in kvm_mips_get_fpu_registers() argument
669 CPUMIPSState *env = cpu_env(cs); in kvm_mips_get_fpu_registers()
670 int err, ret = 0; in kvm_mips_get_fpu_registers()
674 if (env->CP0_Config1 & (1 << CP0C1_FP)) { in kvm_mips_get_fpu_registers()
676 err = kvm_mips_get_one_ureg(cs, KVM_REG_MIPS_FCR_IR, in kvm_mips_get_fpu_registers()
677 &env->active_fpu.fcr0); in kvm_mips_get_fpu_registers()
678 if (err < 0) { in kvm_mips_get_fpu_registers()
682 err = kvm_mips_get_one_ureg(cs, KVM_REG_MIPS_FCR_CSR, in kvm_mips_get_fpu_registers()
683 &env->active_fpu.fcr31); in kvm_mips_get_fpu_registers()
684 if (err < 0) { in kvm_mips_get_fpu_registers()
697 for (i = 0; i < 32; ++i) { in kvm_mips_get_fpu_registers()
698 if (env->CP0_Status & (1 << CP0St_FR)) { in kvm_mips_get_fpu_registers()
699 err = kvm_mips_get_one_ureg64(cs, KVM_REG_MIPS_FPR_64(i), in kvm_mips_get_fpu_registers()
700 &env->active_fpu.fpr[i].d); in kvm_mips_get_fpu_registers()
702 err = kvm_mips_get_one_ureg(cs, KVM_REG_MIPS_FPR_32(i), in kvm_mips_get_fpu_registers()
703 &env->active_fpu.fpr[i].w[FP_ENDIAN_IDX]); in kvm_mips_get_fpu_registers()
705 if (err < 0) { in kvm_mips_get_fpu_registers()
716 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_MSA_IR, in kvm_mips_get_fpu_registers()
717 &env->msair); in kvm_mips_get_fpu_registers()
718 if (err < 0) { in kvm_mips_get_fpu_registers()
722 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_MSA_CSR, in kvm_mips_get_fpu_registers()
723 &env->active_tc.msacsr); in kvm_mips_get_fpu_registers()
724 if (err < 0) { in kvm_mips_get_fpu_registers()
732 for (i = 0; i < 32; ++i) { in kvm_mips_get_fpu_registers()
734 err = kvm_mips_get_one_reg64(cs, KVM_REG_MIPS_VEC_128(i), in kvm_mips_get_fpu_registers()
735 env->active_fpu.fpr[i].wr.d); in kvm_mips_get_fpu_registers()
736 if (err < 0) { in kvm_mips_get_fpu_registers()
747 static int kvm_mips_put_cp0_registers(CPUState *cs, int level) in kvm_mips_put_cp0_registers() argument
749 CPUMIPSState *env = cpu_env(cs); in kvm_mips_put_cp0_registers()
750 int err, ret = 0; in kvm_mips_put_cp0_registers()
754 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_INDEX, &env->CP0_Index); in kvm_mips_put_cp0_registers()
755 if (err < 0) { in kvm_mips_put_cp0_registers()
759 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_RANDOM, &env->CP0_Random); in kvm_mips_put_cp0_registers()
760 if (err < 0) { in kvm_mips_put_cp0_registers()
764 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_CONTEXT, in kvm_mips_put_cp0_registers()
765 &env->CP0_Context); in kvm_mips_put_cp0_registers()
766 if (err < 0) { in kvm_mips_put_cp0_registers()
770 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_USERLOCAL, in kvm_mips_put_cp0_registers()
771 &env->active_tc.CP0_UserLocal); in kvm_mips_put_cp0_registers()
772 if (err < 0) { in kvm_mips_put_cp0_registers()
776 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_PAGEMASK, in kvm_mips_put_cp0_registers()
777 &env->CP0_PageMask); in kvm_mips_put_cp0_registers()
778 if (err < 0) { in kvm_mips_put_cp0_registers()
782 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_PAGEGRAIN, in kvm_mips_put_cp0_registers()
783 &env->CP0_PageGrain); in kvm_mips_put_cp0_registers()
784 if (err < 0) { in kvm_mips_put_cp0_registers()
788 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_PWBASE, in kvm_mips_put_cp0_registers()
789 &env->CP0_PWBase); in kvm_mips_put_cp0_registers()
790 if (err < 0) { in kvm_mips_put_cp0_registers()
794 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_PWFIELD, in kvm_mips_put_cp0_registers()
795 &env->CP0_PWField); in kvm_mips_put_cp0_registers()
796 if (err < 0) { in kvm_mips_put_cp0_registers()
800 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_PWSIZE, in kvm_mips_put_cp0_registers()
801 &env->CP0_PWSize); in kvm_mips_put_cp0_registers()
802 if (err < 0) { in kvm_mips_put_cp0_registers()
806 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_WIRED, &env->CP0_Wired); in kvm_mips_put_cp0_registers()
807 if (err < 0) { in kvm_mips_put_cp0_registers()
811 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_PWCTL, &env->CP0_PWCtl); in kvm_mips_put_cp0_registers()
812 if (err < 0) { in kvm_mips_put_cp0_registers()
816 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_HWRENA, &env->CP0_HWREna); in kvm_mips_put_cp0_registers()
817 if (err < 0) { in kvm_mips_put_cp0_registers()
821 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_BADVADDR, in kvm_mips_put_cp0_registers()
822 &env->CP0_BadVAddr); in kvm_mips_put_cp0_registers()
823 if (err < 0) { in kvm_mips_put_cp0_registers()
830 err = kvm_mips_restore_count(cs); in kvm_mips_put_cp0_registers()
831 if (err < 0) { in kvm_mips_put_cp0_registers()
836 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_ENTRYHI, in kvm_mips_put_cp0_registers()
837 &env->CP0_EntryHi); in kvm_mips_put_cp0_registers()
838 if (err < 0) { in kvm_mips_put_cp0_registers()
842 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_COMPARE, in kvm_mips_put_cp0_registers()
843 &env->CP0_Compare); in kvm_mips_put_cp0_registers()
844 if (err < 0) { in kvm_mips_put_cp0_registers()
848 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_STATUS, &env->CP0_Status); in kvm_mips_put_cp0_registers()
849 if (err < 0) { in kvm_mips_put_cp0_registers()
853 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_EPC, &env->CP0_EPC); in kvm_mips_put_cp0_registers()
854 if (err < 0) { in kvm_mips_put_cp0_registers()
858 err = kvm_mips_put_one_reg(cs, KVM_REG_MIPS_CP0_PRID, &env->CP0_PRid); in kvm_mips_put_cp0_registers()
859 if (err < 0) { in kvm_mips_put_cp0_registers()
863 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_EBASE, &env->CP0_EBase); in kvm_mips_put_cp0_registers()
864 if (err < 0) { in kvm_mips_put_cp0_registers()
868 err = kvm_mips_change_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG, in kvm_mips_put_cp0_registers()
869 &env->CP0_Config0, in kvm_mips_put_cp0_registers()
871 if (err < 0) { in kvm_mips_put_cp0_registers()
875 err = kvm_mips_change_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG1, in kvm_mips_put_cp0_registers()
876 &env->CP0_Config1, in kvm_mips_put_cp0_registers()
878 if (err < 0) { in kvm_mips_put_cp0_registers()
882 err = kvm_mips_change_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG2, in kvm_mips_put_cp0_registers()
883 &env->CP0_Config2, in kvm_mips_put_cp0_registers()
885 if (err < 0) { in kvm_mips_put_cp0_registers()
889 err = kvm_mips_change_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG3, in kvm_mips_put_cp0_registers()
890 &env->CP0_Config3, in kvm_mips_put_cp0_registers()
892 if (err < 0) { in kvm_mips_put_cp0_registers()
896 err = kvm_mips_change_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG4, in kvm_mips_put_cp0_registers()
897 &env->CP0_Config4, in kvm_mips_put_cp0_registers()
899 if (err < 0) { in kvm_mips_put_cp0_registers()
903 err = kvm_mips_change_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG5, in kvm_mips_put_cp0_registers()
904 &env->CP0_Config5, in kvm_mips_put_cp0_registers()
906 if (err < 0) { in kvm_mips_put_cp0_registers()
910 err = kvm_mips_change_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG6, in kvm_mips_put_cp0_registers()
911 &env->CP0_Config6, in kvm_mips_put_cp0_registers()
913 if (err < 0) { in kvm_mips_put_cp0_registers()
917 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_XCONTEXT, in kvm_mips_put_cp0_registers()
918 &env->CP0_XContext); in kvm_mips_put_cp0_registers()
919 if (err < 0) { in kvm_mips_put_cp0_registers()
923 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_ERROREPC, in kvm_mips_put_cp0_registers()
924 &env->CP0_ErrorEPC); in kvm_mips_put_cp0_registers()
925 if (err < 0) { in kvm_mips_put_cp0_registers()
929 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH1, in kvm_mips_put_cp0_registers()
930 &env->CP0_KScratch[0]); in kvm_mips_put_cp0_registers()
931 if (err < 0) { in kvm_mips_put_cp0_registers()
935 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH2, in kvm_mips_put_cp0_registers()
936 &env->CP0_KScratch[1]); in kvm_mips_put_cp0_registers()
937 if (err < 0) { in kvm_mips_put_cp0_registers()
941 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH3, in kvm_mips_put_cp0_registers()
942 &env->CP0_KScratch[2]); in kvm_mips_put_cp0_registers()
943 if (err < 0) { in kvm_mips_put_cp0_registers()
947 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH4, in kvm_mips_put_cp0_registers()
948 &env->CP0_KScratch[3]); in kvm_mips_put_cp0_registers()
949 if (err < 0) { in kvm_mips_put_cp0_registers()
953 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH5, in kvm_mips_put_cp0_registers()
954 &env->CP0_KScratch[4]); in kvm_mips_put_cp0_registers()
955 if (err < 0) { in kvm_mips_put_cp0_registers()
959 err = kvm_mips_put_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH6, in kvm_mips_put_cp0_registers()
960 &env->CP0_KScratch[5]); in kvm_mips_put_cp0_registers()
961 if (err < 0) { in kvm_mips_put_cp0_registers()
969 static int kvm_mips_get_cp0_registers(CPUState *cs) in kvm_mips_get_cp0_registers() argument
971 CPUMIPSState *env = cpu_env(cs); in kvm_mips_get_cp0_registers()
972 int err, ret = 0; in kvm_mips_get_cp0_registers()
974 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_INDEX, &env->CP0_Index); in kvm_mips_get_cp0_registers()
975 if (err < 0) { in kvm_mips_get_cp0_registers()
979 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_RANDOM, &env->CP0_Random); in kvm_mips_get_cp0_registers()
980 if (err < 0) { in kvm_mips_get_cp0_registers()
984 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_CONTEXT, in kvm_mips_get_cp0_registers()
985 &env->CP0_Context); in kvm_mips_get_cp0_registers()
986 if (err < 0) { in kvm_mips_get_cp0_registers()
990 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_USERLOCAL, in kvm_mips_get_cp0_registers()
991 &env->active_tc.CP0_UserLocal); in kvm_mips_get_cp0_registers()
992 if (err < 0) { in kvm_mips_get_cp0_registers()
996 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_PAGEMASK, in kvm_mips_get_cp0_registers()
997 &env->CP0_PageMask); in kvm_mips_get_cp0_registers()
998 if (err < 0) { in kvm_mips_get_cp0_registers()
1002 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_PAGEGRAIN, in kvm_mips_get_cp0_registers()
1003 &env->CP0_PageGrain); in kvm_mips_get_cp0_registers()
1004 if (err < 0) { in kvm_mips_get_cp0_registers()
1008 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_PWBASE, in kvm_mips_get_cp0_registers()
1009 &env->CP0_PWBase); in kvm_mips_get_cp0_registers()
1010 if (err < 0) { in kvm_mips_get_cp0_registers()
1014 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_PWFIELD, in kvm_mips_get_cp0_registers()
1015 &env->CP0_PWField); in kvm_mips_get_cp0_registers()
1016 if (err < 0) { in kvm_mips_get_cp0_registers()
1020 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_PWSIZE, in kvm_mips_get_cp0_registers()
1021 &env->CP0_PWSize); in kvm_mips_get_cp0_registers()
1022 if (err < 0) { in kvm_mips_get_cp0_registers()
1026 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_WIRED, &env->CP0_Wired); in kvm_mips_get_cp0_registers()
1027 if (err < 0) { in kvm_mips_get_cp0_registers()
1031 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_PWCTL, &env->CP0_PWCtl); in kvm_mips_get_cp0_registers()
1032 if (err < 0) { in kvm_mips_get_cp0_registers()
1036 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_HWRENA, &env->CP0_HWREna); in kvm_mips_get_cp0_registers()
1037 if (err < 0) { in kvm_mips_get_cp0_registers()
1041 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_BADVADDR, in kvm_mips_get_cp0_registers()
1042 &env->CP0_BadVAddr); in kvm_mips_get_cp0_registers()
1043 if (err < 0) { in kvm_mips_get_cp0_registers()
1047 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_ENTRYHI, in kvm_mips_get_cp0_registers()
1048 &env->CP0_EntryHi); in kvm_mips_get_cp0_registers()
1049 if (err < 0) { in kvm_mips_get_cp0_registers()
1053 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_COMPARE, in kvm_mips_get_cp0_registers()
1054 &env->CP0_Compare); in kvm_mips_get_cp0_registers()
1055 if (err < 0) { in kvm_mips_get_cp0_registers()
1059 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_STATUS, &env->CP0_Status); in kvm_mips_get_cp0_registers()
1060 if (err < 0) { in kvm_mips_get_cp0_registers()
1067 err = kvm_mips_save_count(cs); in kvm_mips_get_cp0_registers()
1068 if (err < 0) { in kvm_mips_get_cp0_registers()
1073 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_EPC, &env->CP0_EPC); in kvm_mips_get_cp0_registers()
1074 if (err < 0) { in kvm_mips_get_cp0_registers()
1078 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_PRID, &env->CP0_PRid); in kvm_mips_get_cp0_registers()
1079 if (err < 0) { in kvm_mips_get_cp0_registers()
1083 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_EBASE, &env->CP0_EBase); in kvm_mips_get_cp0_registers()
1084 if (err < 0) { in kvm_mips_get_cp0_registers()
1088 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG, &env->CP0_Config0); in kvm_mips_get_cp0_registers()
1089 if (err < 0) { in kvm_mips_get_cp0_registers()
1093 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG1, &env->CP0_Config1); in kvm_mips_get_cp0_registers()
1094 if (err < 0) { in kvm_mips_get_cp0_registers()
1098 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG2, &env->CP0_Config2); in kvm_mips_get_cp0_registers()
1099 if (err < 0) { in kvm_mips_get_cp0_registers()
1103 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG3, &env->CP0_Config3); in kvm_mips_get_cp0_registers()
1104 if (err < 0) { in kvm_mips_get_cp0_registers()
1108 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG4, &env->CP0_Config4); in kvm_mips_get_cp0_registers()
1109 if (err < 0) { in kvm_mips_get_cp0_registers()
1113 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG5, &env->CP0_Config5); in kvm_mips_get_cp0_registers()
1114 if (err < 0) { in kvm_mips_get_cp0_registers()
1118 err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_CONFIG6, &env->CP0_Config6); in kvm_mips_get_cp0_registers()
1119 if (err < 0) { in kvm_mips_get_cp0_registers()
1123 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_XCONTEXT, in kvm_mips_get_cp0_registers()
1124 &env->CP0_XContext); in kvm_mips_get_cp0_registers()
1125 if (err < 0) { in kvm_mips_get_cp0_registers()
1129 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_ERROREPC, in kvm_mips_get_cp0_registers()
1130 &env->CP0_ErrorEPC); in kvm_mips_get_cp0_registers()
1131 if (err < 0) { in kvm_mips_get_cp0_registers()
1135 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH1, in kvm_mips_get_cp0_registers()
1136 &env->CP0_KScratch[0]); in kvm_mips_get_cp0_registers()
1137 if (err < 0) { in kvm_mips_get_cp0_registers()
1141 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH2, in kvm_mips_get_cp0_registers()
1142 &env->CP0_KScratch[1]); in kvm_mips_get_cp0_registers()
1143 if (err < 0) { in kvm_mips_get_cp0_registers()
1147 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH3, in kvm_mips_get_cp0_registers()
1148 &env->CP0_KScratch[2]); in kvm_mips_get_cp0_registers()
1149 if (err < 0) { in kvm_mips_get_cp0_registers()
1153 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH4, in kvm_mips_get_cp0_registers()
1154 &env->CP0_KScratch[3]); in kvm_mips_get_cp0_registers()
1155 if (err < 0) { in kvm_mips_get_cp0_registers()
1159 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH5, in kvm_mips_get_cp0_registers()
1160 &env->CP0_KScratch[4]); in kvm_mips_get_cp0_registers()
1161 if (err < 0) { in kvm_mips_get_cp0_registers()
1165 err = kvm_mips_get_one_ulreg(cs, KVM_REG_MIPS_CP0_KSCRATCH6, in kvm_mips_get_cp0_registers()
1166 &env->CP0_KScratch[5]); in kvm_mips_get_cp0_registers()
1167 if (err < 0) { in kvm_mips_get_cp0_registers()
1175 int kvm_arch_put_registers(CPUState *cs, int level, Error **errp) in kvm_arch_put_registers() argument
1177 CPUMIPSState *env = cpu_env(cs); in kvm_arch_put_registers()
1183 for (i = 0; i < 32; i++) { in kvm_arch_put_registers()
1184 regs.gpr[i] = (int64_t)(target_long)env->active_tc.gpr[i]; in kvm_arch_put_registers()
1187 regs.hi = (int64_t)(target_long)env->active_tc.HI[0]; in kvm_arch_put_registers()
1188 regs.lo = (int64_t)(target_long)env->active_tc.LO[0]; in kvm_arch_put_registers()
1189 regs.pc = (int64_t)(target_long)env->active_tc.PC; in kvm_arch_put_registers()
1191 ret = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); in kvm_arch_put_registers()
1193 if (ret < 0) { in kvm_arch_put_registers()
1197 ret = kvm_mips_put_cp0_registers(cs, level); in kvm_arch_put_registers()
1198 if (ret < 0) { in kvm_arch_put_registers()
1202 ret = kvm_mips_put_fpu_registers(cs, level); in kvm_arch_put_registers()
1203 if (ret < 0) { in kvm_arch_put_registers()
1210 int kvm_arch_get_registers(CPUState *cs, Error **errp) in kvm_arch_get_registers() argument
1212 CPUMIPSState *env = cpu_env(cs); in kvm_arch_get_registers()
1213 int ret = 0; in kvm_arch_get_registers()
1218 ret = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); in kvm_arch_get_registers()
1220 if (ret < 0) { in kvm_arch_get_registers()
1224 for (i = 0; i < 32; i++) { in kvm_arch_get_registers()
1225 env->active_tc.gpr[i] = regs.gpr[i]; in kvm_arch_get_registers()
1228 env->active_tc.HI[0] = regs.hi; in kvm_arch_get_registers()
1229 env->active_tc.LO[0] = regs.lo; in kvm_arch_get_registers()
1230 env->active_tc.PC = regs.pc; in kvm_arch_get_registers()
1232 kvm_mips_get_cp0_registers(cs); in kvm_arch_get_registers()
1233 kvm_mips_get_fpu_registers(cs); in kvm_arch_get_registers()
1241 return 0; in kvm_arch_fixup_msi_route()
1247 return 0; in kvm_arch_add_msi_route_post()
1252 return 0; in kvm_arch_release_virq_post()
1264 KVMState *s = KVM_STATE(machine->accelerator); in kvm_arch_get_default_type()
1267 if (r > 0) { in kvm_arch_get_default_type()
1273 return -1; in kvm_arch_get_default_type()