Lines Matching refs:a
18 * You should have received a copy of the GNU Lesser General Public
24 * a result, most operand load and writeback is done entirely in common
26 * size (X86_SIZE_*) codes used in the manual. There are a few differences
49 * (respectively selecting an ALU operand, like the operand type E, or a
58 * Finally, a "nop" operand type is used for multi-byte NOPs. It accepts
71 * only the second row is included and the instruction is marked as a
80 * There is a custom size "xh" used to address half of a SSE/AVX operand.
81 * This points to a 64-bit operand for SSE operations, 128-bit operand
85 * There are a couple cases in which instructions (e.g. MOVD) write the
94 * all exception-class 6 instructions as having a mandatory VEX prefix.
95 * This is true except for a dozen instructions; these are in exception
97 * without a VEX prefix). These instructions are mostly listed in Intel's
98 * table 2-16, but with a few exceptions.
103 * without defining what a mixed memory argument is, but still use 4 as the
137 * instruction mnemonics. There is only a handful of opcodes still using
138 * a switch statement to decode modrm bits 3-5 and prefixes after decoding
257 #define chk(a) .check = X86_CHECK_##a,
258 #define chk2(a, b) .check = X86_CHECK_##a | X86_CHECK_##b,
259 #define chk3(a, b, c) .check = X86_CHECK_##a | X86_CHECK_##b | X86_CHECK_##c,
260 #define svm(a) .intercept = SVM_EXIT_##a, .has_intercept = true,
1292 * more like an Ib operand. Dispatch to the right helper in a single gen_*
1384 /* decoded as modrm, which is visible as a difference between page fault and #UD */
1634 [0x62] = X86_OP_ENTRYrr(BOUND, G,v, M,a, chk(i64)),
2018 case X86_TYPE_B: /* VEX.vvvv selects a GPR */
2023 case X86_TYPE_C: /* REG in the modrm byte selects a control register */
2039 case X86_TYPE_D: /* REG in the modrm byte selects a debug register */
2054 case X86_TYPE_G: /* REG in the modrm byte selects a GPR */
2058 case X86_TYPE_S: /* reg selects a segment register */
2110 case X86_TYPE_R: /* R/M in the modrm byte selects a register */
2126 case X86_TYPE_M: /* modrm byte selects a memory operand */
2164 case X86_TYPE_J: /* Relative offset for a jump */
2174 case X86_TYPE_L: /* The upper 4 bits of the immediate select a 128-bit register */
2430 /* Must have a VSIB byte and no address prefix. */
2646 case 0x03: /* Implied 0f 3a leading opcode bytes. */