Lines Matching +full:cpu +full:- +full:1
30 * 1. Redistributions of source code must retain the above copyright
50 #include "qemu/error-report.h"
59 #include "hvf-i386.h"
75 #include "qemu/main-loop.h"
77 #include "target/i386/cpu.h"
81 void vmx_update_tpr(CPUState *cpu) in vmx_update_tpr() argument
84 X86CPU *x86_cpu = X86_CPU(cpu); in vmx_update_tpr()
85 int tpr = cpu_get_apic_tpr(x86_cpu->apic_state) << 4; in vmx_update_tpr()
86 int irr = apic_get_highest_priority_irr(x86_cpu->apic_state); in vmx_update_tpr()
88 wreg(cpu->accel->fd, HV_X86_TPR, tpr); in vmx_update_tpr()
89 if (irr == -1) { in vmx_update_tpr()
90 wvmcs(cpu->accel->fd, VMCS_TPR_THRESHOLD, 0); in vmx_update_tpr()
92 wvmcs(cpu->accel->fd, VMCS_TPR_THRESHOLD, (irr > tpr) ? tpr >> 4 : in vmx_update_tpr()
97 static void update_apic_tpr(CPUState *cpu) in update_apic_tpr() argument
99 X86CPU *x86_cpu = X86_CPU(cpu); in update_apic_tpr()
100 int tpr = rreg(cpu->accel->fd, HV_X86_TPR) >> 4; in update_apic_tpr()
101 cpu_set_apic_tpr(x86_cpu->apic_state, tpr); in update_apic_tpr()
130 read = ept_qual & EPT_VIOLATION_DATA_READ ? 1 : 0; in ept_emulation_fault()
131 write = ept_qual & EPT_VIOLATION_DATA_WRITE ? 1 : 0; in ept_emulation_fault()
137 if (slot->flags & HVF_SLOT_LOG) { in ept_emulation_fault()
138 uint64_t dirty_page_start = gpa & ~(TARGET_PAGE_SIZE - 1u); in ept_emulation_fault()
139 memory_region_set_dirty(slot->region, gpa - slot->start, 1); in ept_emulation_fault()
147 * guest-physical address that is a translation of a guest-linear in ept_emulation_fault()
158 if (!memory_region_is_ram(slot->region) && in ept_emulation_fault()
159 !(read && memory_region_is_romd(slot->region))) { in ept_emulation_fault()
165 void hvf_arch_vcpu_destroy(CPUState *cpu) in hvf_arch_vcpu_destroy() argument
167 X86CPU *x86_cpu = X86_CPU(cpu); in hvf_arch_vcpu_destroy()
168 CPUX86State *env = &x86_cpu->env; in hvf_arch_vcpu_destroy()
170 g_free(env->hvf_mmio_buf); in hvf_arch_vcpu_destroy()
178 if (env->tsc_khz != 0) { in init_tsc_freq()
186 env->tsc_khz = tsc_freq / 1000; /* Hz to KHz */ in init_tsc_freq()
194 if (env->apic_bus_freq != 0) { in init_apic_bus_freq()
202 env->apic_bus_freq = bus_freq; in init_apic_bus_freq()
207 return env->tsc_khz != 0; in tsc_is_known()
212 return env->apic_bus_freq != 0; in apic_bus_freq_is_known()
215 void hvf_kick_vcpu_thread(CPUState *cpu) in hvf_kick_vcpu_thread() argument
217 cpus_kick_thread(cpu); in hvf_kick_vcpu_thread()
218 hv_vcpu_interrupt(&cpu->accel->fd, 1); in hvf_kick_vcpu_thread()
231 int hvf_arch_init_vcpu(CPUState *cpu) in hvf_arch_init_vcpu() argument
233 X86CPU *x86cpu = X86_CPU(cpu); in hvf_arch_init_vcpu()
234 CPUX86State *env = &x86cpu->env; in hvf_arch_init_vcpu()
242 if (hvf_state->hvf_caps == NULL) { in hvf_arch_init_vcpu()
243 hvf_state->hvf_caps = g_new0(struct hvf_vcpu_caps, 1); in hvf_arch_init_vcpu()
245 env->hvf_mmio_buf = g_new(char, 4096); in hvf_arch_init_vcpu()
247 if (x86cpu->vmware_cpuid_freq) { in hvf_arch_init_vcpu()
252 error_report("vmware-cpuid-freq: feature couldn't be enabled"); in hvf_arch_init_vcpu()
256 if ((env->features[FEAT_8000_0007_EDX] & CPUID_APM_INVTSC) && in hvf_arch_init_vcpu()
259 "State blocked by non-migratable CPU device (invtsc flag)"); in hvf_arch_init_vcpu()
269 &hvf_state->hvf_caps->vmx_cap_pinbased)) { in hvf_arch_init_vcpu()
273 &hvf_state->hvf_caps->vmx_cap_procbased)) { in hvf_arch_init_vcpu()
277 &hvf_state->hvf_caps->vmx_cap_procbased2)) { in hvf_arch_init_vcpu()
281 &hvf_state->hvf_caps->vmx_cap_entry)) { in hvf_arch_init_vcpu()
286 wvmcs(cpu->accel->fd, VMCS_PIN_BASED_CTLS, in hvf_arch_init_vcpu()
287 cap2ctrl(hvf_state->hvf_caps->vmx_cap_pinbased, in hvf_arch_init_vcpu()
291 wvmcs(cpu->accel->fd, VMCS_PRI_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
292 cap2ctrl(hvf_state->hvf_caps->vmx_cap_procbased, in hvf_arch_init_vcpu()
306 wvmcs(cpu->accel->fd, VMCS_SEC_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
307 cap2ctrl(hvf_state->hvf_caps->vmx_cap_procbased2, reqCap)); in hvf_arch_init_vcpu()
309 wvmcs(cpu->accel->fd, VMCS_ENTRY_CTLS, in hvf_arch_init_vcpu()
310 cap2ctrl(hvf_state->hvf_caps->vmx_cap_entry, 0)); in hvf_arch_init_vcpu()
311 wvmcs(cpu->accel->fd, VMCS_EXCEPTION_BITMAP, 0); /* Double fault */ in hvf_arch_init_vcpu()
313 wvmcs(cpu->accel->fd, VMCS_TPR_THRESHOLD, 0); in hvf_arch_init_vcpu()
315 x86cpu = X86_CPU(cpu); in hvf_arch_init_vcpu()
316 x86cpu->env.xsave_buf_len = 4096; in hvf_arch_init_vcpu()
317 x86cpu->env.xsave_buf = qemu_memalign(4096, x86cpu->env.xsave_buf_len); in hvf_arch_init_vcpu()
323 assert(hvf_get_supported_cpuid(0xd, 0, R_ECX) <= x86cpu->env.xsave_buf_len); in hvf_arch_init_vcpu()
325 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_STAR, 1); in hvf_arch_init_vcpu()
326 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_LSTAR, 1); in hvf_arch_init_vcpu()
327 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_CSTAR, 1); in hvf_arch_init_vcpu()
328 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_FMASK, 1); in hvf_arch_init_vcpu()
329 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_FSBASE, 1); in hvf_arch_init_vcpu()
330 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_GSBASE, 1); in hvf_arch_init_vcpu()
331 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_KERNELGSBASE, 1); in hvf_arch_init_vcpu()
332 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_TSC_AUX, 1); in hvf_arch_init_vcpu()
333 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_IA32_TSC, 1); in hvf_arch_init_vcpu()
334 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_IA32_SYSENTER_CS, 1); in hvf_arch_init_vcpu()
335 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_IA32_SYSENTER_EIP, 1); in hvf_arch_init_vcpu()
336 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_IA32_SYSENTER_ESP, 1); in hvf_arch_init_vcpu()
341 static void hvf_store_events(CPUState *cpu, uint32_t ins_len, uint64_t idtvec_info) in hvf_store_events() argument
343 X86CPU *x86_cpu = X86_CPU(cpu); in hvf_store_events()
344 CPUX86State *env = &x86_cpu->env; in hvf_store_events()
346 env->exception_nr = -1; in hvf_store_events()
347 env->exception_pending = 0; in hvf_store_events()
348 env->exception_injected = 0; in hvf_store_events()
349 env->interrupt_injected = -1; in hvf_store_events()
350 env->nmi_injected = false; in hvf_store_events()
351 env->ins_len = 0; in hvf_store_events()
352 env->has_error_code = false; in hvf_store_events()
357 env->interrupt_injected = idtvec_info & VMCS_IDT_VEC_VECNUM; in hvf_store_events()
360 env->nmi_injected = true; in hvf_store_events()
364 env->exception_nr = idtvec_info & VMCS_IDT_VEC_VECNUM; in hvf_store_events()
365 env->exception_injected = 1; in hvf_store_events()
373 env->ins_len = ins_len; in hvf_store_events()
376 env->has_error_code = true; in hvf_store_events()
377 env->error_code = rvmcs(cpu->accel->fd, VMCS_IDT_VECTORING_ERROR); in hvf_store_events()
380 if ((rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY) & in hvf_store_events()
382 env->hflags2 |= HF2_NMI_MASK; in hvf_store_events()
384 env->hflags2 &= ~HF2_NMI_MASK; in hvf_store_events()
386 if (rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY) & in hvf_store_events()
389 env->hflags |= HF_INHIBIT_IRQ_MASK; in hvf_store_events()
391 env->hflags &= ~HF_INHIBIT_IRQ_MASK; in hvf_store_events()
401 * leafs 0x40000001-0x4000000F are filled with zeros in hvf_cpu_x86_cpuid()
402 * Provides vmware-cpuid-freq support to hvf in hvf_cpu_x86_cpuid()
423 *eax = env->tsc_khz; in hvf_cpu_x86_cpuid()
424 *ebx = env->apic_bus_freq / 1000; /* Hz to KHz */ in hvf_cpu_x86_cpuid()
437 int hvf_vcpu_exec(CPUState *cpu) in hvf_vcpu_exec() argument
439 X86CPU *x86_cpu = X86_CPU(cpu); in hvf_vcpu_exec()
440 CPUX86State *env = &x86_cpu->env; in hvf_vcpu_exec()
444 if (hvf_process_events(cpu)) { in hvf_vcpu_exec()
449 if (cpu->accel->dirty) { in hvf_vcpu_exec()
450 hvf_put_registers(cpu); in hvf_vcpu_exec()
451 cpu->accel->dirty = false; in hvf_vcpu_exec()
454 if (hvf_inject_interrupts(cpu)) { in hvf_vcpu_exec()
457 vmx_update_tpr(cpu); in hvf_vcpu_exec()
460 if (!cpu_is_bsp(X86_CPU(cpu)) && cpu->halted) { in hvf_vcpu_exec()
465 hv_return_t r = hv_vcpu_run_until(cpu->accel->fd, HV_DEADLINE_FOREVER); in hvf_vcpu_exec()
469 uint64_t exit_reason = rvmcs(cpu->accel->fd, VMCS_EXIT_REASON); in hvf_vcpu_exec()
470 uint64_t exit_qual = rvmcs(cpu->accel->fd, VMCS_EXIT_QUALIFICATION); in hvf_vcpu_exec()
471 uint32_t ins_len = (uint32_t)rvmcs(cpu->accel->fd, in hvf_vcpu_exec()
474 uint64_t idtvec_info = rvmcs(cpu->accel->fd, VMCS_IDT_VECTORING_INFO); in hvf_vcpu_exec()
476 hvf_store_events(cpu, ins_len, idtvec_info); in hvf_vcpu_exec()
477 rip = rreg(cpu->accel->fd, HV_X86_RIP); in hvf_vcpu_exec()
478 env->eflags = rreg(cpu->accel->fd, HV_X86_RFLAGS); in hvf_vcpu_exec()
482 update_apic_tpr(cpu); in hvf_vcpu_exec()
483 current_cpu = cpu; in hvf_vcpu_exec()
488 macvm_set_rip(cpu, rip + ins_len); in hvf_vcpu_exec()
489 if (!((cpu->interrupt_request & CPU_INTERRUPT_HARD) && in hvf_vcpu_exec()
490 (env->eflags & IF_MASK)) in hvf_vcpu_exec()
491 && !(cpu->interrupt_request & CPU_INTERRUPT_NMI) && in hvf_vcpu_exec()
493 cpu->halted = 1; in hvf_vcpu_exec()
508 uint64_t gpa = rvmcs(cpu->accel->fd, VMCS_GUEST_PHYSICAL_ADDRESS); in hvf_vcpu_exec()
512 vmx_set_nmi_blocking(cpu); in hvf_vcpu_exec()
515 slot = hvf_find_overlap_slot(gpa, 1); in hvf_vcpu_exec()
520 load_regs(cpu); in hvf_vcpu_exec()
523 store_regs(cpu); in hvf_vcpu_exec()
531 uint32_t size = (exit_qual & 7) + 1; in hvf_vcpu_exec()
538 load_regs(cpu); in hvf_vcpu_exec()
539 hvf_handle_io(env, port, &val, 0, size, 1); in hvf_vcpu_exec()
540 if (size == 1) { in hvf_vcpu_exec()
549 env->eip += ins_len; in hvf_vcpu_exec()
550 store_regs(cpu); in hvf_vcpu_exec()
553 RAX(env) = rreg(cpu->accel->fd, HV_X86_RAX); in hvf_vcpu_exec()
554 hvf_handle_io(env, port, &RAX(env), 1, size, 1); in hvf_vcpu_exec()
555 macvm_set_rip(cpu, rip + ins_len); in hvf_vcpu_exec()
560 load_regs(cpu); in hvf_vcpu_exec()
564 store_regs(cpu); in hvf_vcpu_exec()
569 uint32_t rax = (uint32_t)rreg(cpu->accel->fd, HV_X86_RAX); in hvf_vcpu_exec()
570 uint32_t rbx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RBX); in hvf_vcpu_exec()
571 uint32_t rcx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RCX); in hvf_vcpu_exec()
572 uint32_t rdx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RDX); in hvf_vcpu_exec()
574 if (rax == 1) { in hvf_vcpu_exec()
576 env->cr[4] = rvmcs(cpu->accel->fd, VMCS_GUEST_CR4); in hvf_vcpu_exec()
580 wreg(cpu->accel->fd, HV_X86_RAX, rax); in hvf_vcpu_exec()
581 wreg(cpu->accel->fd, HV_X86_RBX, rbx); in hvf_vcpu_exec()
582 wreg(cpu->accel->fd, HV_X86_RCX, rcx); in hvf_vcpu_exec()
583 wreg(cpu->accel->fd, HV_X86_RDX, rdx); in hvf_vcpu_exec()
585 macvm_set_rip(cpu, rip + ins_len); in hvf_vcpu_exec()
589 uint32_t eax = (uint32_t)rreg(cpu->accel->fd, HV_X86_RAX); in hvf_vcpu_exec()
590 uint32_t ecx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RCX); in hvf_vcpu_exec()
591 uint32_t edx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RDX); in hvf_vcpu_exec()
594 macvm_set_rip(cpu, rip + ins_len); in hvf_vcpu_exec()
597 env->xcr0 = ((uint64_t)edx << 32) | eax; in hvf_vcpu_exec()
598 wreg(cpu->accel->fd, HV_X86_XCR0, env->xcr0 | 1); in hvf_vcpu_exec()
599 macvm_set_rip(cpu, rip + ins_len); in hvf_vcpu_exec()
603 vmx_clear_int_window_exiting(cpu); in hvf_vcpu_exec()
607 vmx_clear_nmi_window_exiting(cpu); in hvf_vcpu_exec()
617 load_regs(cpu); in hvf_vcpu_exec()
623 env->eip += ins_len; in hvf_vcpu_exec()
624 store_regs(cpu); in hvf_vcpu_exec()
631 load_regs(cpu); in hvf_vcpu_exec()
637 macvm_set_cr0(cpu->accel->fd, RRX(env, reg)); in hvf_vcpu_exec()
641 macvm_set_cr4(cpu->accel->fd, RRX(env, reg)); in hvf_vcpu_exec()
646 RRX(env, reg) = cpu_get_apic_tpr(x86_cpu->apic_state); in hvf_vcpu_exec()
649 cpu_set_apic_tpr(x86_cpu->apic_state, tpr); in hvf_vcpu_exec()
658 env->eip += ins_len; in hvf_vcpu_exec()
659 store_regs(cpu); in hvf_vcpu_exec()
665 load_regs(cpu); in hvf_vcpu_exec()
668 store_regs(cpu); in hvf_vcpu_exec()
672 ret = 1; in hvf_vcpu_exec()
676 uint64_t vinfo = rvmcs(cpu->accel->fd, VMCS_IDT_VECTORING_INFO); in hvf_vcpu_exec()
678 vmx_handle_task_switch(cpu, sel, (exit_qual >> 30) & 0x3, in hvf_vcpu_exec()
689 wreg(cpu->accel->fd, HV_X86_RAX, 0); in hvf_vcpu_exec()
690 wreg(cpu->accel->fd, HV_X86_RDX, 0); in hvf_vcpu_exec()
691 macvm_set_rip(cpu, rip + ins_len); in hvf_vcpu_exec()
694 env->exception_nr = EXCP0D_GPF; in hvf_vcpu_exec()
695 env->exception_injected = 1; in hvf_vcpu_exec()
696 env->has_error_code = true; in hvf_vcpu_exec()
697 env->error_code = 0; in hvf_vcpu_exec()
707 int hvf_arch_insert_sw_breakpoint(CPUState *cpu, struct hvf_sw_breakpoint *bp) in hvf_arch_insert_sw_breakpoint() argument
709 return -ENOSYS; in hvf_arch_insert_sw_breakpoint()
712 int hvf_arch_remove_sw_breakpoint(CPUState *cpu, struct hvf_sw_breakpoint *bp) in hvf_arch_remove_sw_breakpoint() argument
714 return -ENOSYS; in hvf_arch_remove_sw_breakpoint()
719 return -ENOSYS; in hvf_arch_insert_hw_breakpoint()
724 return -ENOSYS; in hvf_arch_remove_hw_breakpoint()
731 void hvf_arch_update_guest_debug(CPUState *cpu) in hvf_arch_update_guest_debug() argument