Lines Matching full:accel
76 #include "qemu/accel.h"
88 wreg(cpu->accel->fd, HV_X86_TPR, tpr); in vmx_update_tpr()
90 wvmcs(cpu->accel->fd, VMCS_TPR_THRESHOLD, 0); in vmx_update_tpr()
92 wvmcs(cpu->accel->fd, VMCS_TPR_THRESHOLD, (irr > tpr) ? tpr >> 4 : in vmx_update_tpr()
100 int tpr = rreg(cpu->accel->fd, HV_X86_TPR) >> 4; in update_apic_tpr()
218 hv_vcpu_interrupt(&cpu->accel->fd, 1); in hvf_kick_vcpu_thread()
286 wvmcs(cpu->accel->fd, VMCS_PIN_BASED_CTLS, in hvf_arch_init_vcpu()
291 wvmcs(cpu->accel->fd, VMCS_PRI_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
306 wvmcs(cpu->accel->fd, VMCS_SEC_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
309 wvmcs(cpu->accel->fd, VMCS_ENTRY_CTLS, in hvf_arch_init_vcpu()
311 wvmcs(cpu->accel->fd, VMCS_EXCEPTION_BITMAP, 0); /* Double fault */ in hvf_arch_init_vcpu()
313 wvmcs(cpu->accel->fd, VMCS_TPR_THRESHOLD, 0); in hvf_arch_init_vcpu()
325 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_STAR, 1); in hvf_arch_init_vcpu()
326 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_LSTAR, 1); in hvf_arch_init_vcpu()
327 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_CSTAR, 1); in hvf_arch_init_vcpu()
328 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_FMASK, 1); in hvf_arch_init_vcpu()
329 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_FSBASE, 1); in hvf_arch_init_vcpu()
330 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_GSBASE, 1); in hvf_arch_init_vcpu()
331 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_KERNELGSBASE, 1); in hvf_arch_init_vcpu()
332 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_TSC_AUX, 1); in hvf_arch_init_vcpu()
333 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_IA32_TSC, 1); in hvf_arch_init_vcpu()
334 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_IA32_SYSENTER_CS, 1); in hvf_arch_init_vcpu()
335 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_IA32_SYSENTER_EIP, 1); in hvf_arch_init_vcpu()
336 hv_vcpu_enable_native_msr(cpu->accel->fd, MSR_IA32_SYSENTER_ESP, 1); in hvf_arch_init_vcpu()
377 env->error_code = rvmcs(cpu->accel->fd, VMCS_IDT_VECTORING_ERROR); in hvf_store_events()
380 if ((rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY) & in hvf_store_events()
386 if (rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY) & in hvf_store_events()
449 if (cpu->accel->dirty) { in hvf_vcpu_exec()
451 cpu->accel->dirty = false; in hvf_vcpu_exec()
465 hv_return_t r = hv_vcpu_run_until(cpu->accel->fd, HV_DEADLINE_FOREVER); in hvf_vcpu_exec()
469 uint64_t exit_reason = rvmcs(cpu->accel->fd, VMCS_EXIT_REASON); in hvf_vcpu_exec()
470 uint64_t exit_qual = rvmcs(cpu->accel->fd, VMCS_EXIT_QUALIFICATION); in hvf_vcpu_exec()
471 uint32_t ins_len = (uint32_t)rvmcs(cpu->accel->fd, in hvf_vcpu_exec()
474 uint64_t idtvec_info = rvmcs(cpu->accel->fd, VMCS_IDT_VECTORING_INFO); in hvf_vcpu_exec()
477 rip = rreg(cpu->accel->fd, HV_X86_RIP); in hvf_vcpu_exec()
478 env->eflags = rreg(cpu->accel->fd, HV_X86_RFLAGS); in hvf_vcpu_exec()
508 uint64_t gpa = rvmcs(cpu->accel->fd, VMCS_GUEST_PHYSICAL_ADDRESS); in hvf_vcpu_exec()
553 RAX(env) = rreg(cpu->accel->fd, HV_X86_RAX); in hvf_vcpu_exec()
569 uint32_t rax = (uint32_t)rreg(cpu->accel->fd, HV_X86_RAX); in hvf_vcpu_exec()
570 uint32_t rbx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RBX); in hvf_vcpu_exec()
571 uint32_t rcx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RCX); in hvf_vcpu_exec()
572 uint32_t rdx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RDX); in hvf_vcpu_exec()
576 env->cr[4] = rvmcs(cpu->accel->fd, VMCS_GUEST_CR4); in hvf_vcpu_exec()
580 wreg(cpu->accel->fd, HV_X86_RAX, rax); in hvf_vcpu_exec()
581 wreg(cpu->accel->fd, HV_X86_RBX, rbx); in hvf_vcpu_exec()
582 wreg(cpu->accel->fd, HV_X86_RCX, rcx); in hvf_vcpu_exec()
583 wreg(cpu->accel->fd, HV_X86_RDX, rdx); in hvf_vcpu_exec()
589 uint32_t eax = (uint32_t)rreg(cpu->accel->fd, HV_X86_RAX); in hvf_vcpu_exec()
590 uint32_t ecx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RCX); in hvf_vcpu_exec()
591 uint32_t edx = (uint32_t)rreg(cpu->accel->fd, HV_X86_RDX); in hvf_vcpu_exec()
598 wreg(cpu->accel->fd, HV_X86_XCR0, env->xcr0 | 1); in hvf_vcpu_exec()
637 macvm_set_cr0(cpu->accel->fd, RRX(env, reg)); in hvf_vcpu_exec()
641 macvm_set_cr4(cpu->accel->fd, RRX(env, reg)); in hvf_vcpu_exec()
676 uint64_t vinfo = rvmcs(cpu->accel->fd, VMCS_IDT_VECTORING_INFO); in hvf_vcpu_exec()
689 wreg(cpu->accel->fd, HV_X86_RAX, 0); in hvf_vcpu_exec()
690 wreg(cpu->accel->fd, HV_X86_RDX, 0); in hvf_vcpu_exec()