Lines Matching +full:write +full:- +full:assist
21 #include "qemu/main-loop.h"
24 #include "exec/helper-proto.h"
31 if (cpu->env.cr[CR_EIRR]) { in eval_interrupt()
39 * can write to this word to raise an external interrupt on the target CPU.
48 return cpu->env.cr[CR_EIRR]; in io_eir_read()
55 CPUHPPAState *env = &cpu->env; in io_eir_write()
60 if (hppa_is_pa20(env) && env->cr[CR_PSW_DEFAULT] & PDC_PSW_WIDE_BIT) { in io_eir_write()
65 env->cr[CR_EIRR] |= 1ull << le_bit; in io_eir_write()
71 .write = io_eir_write,
86 env->cr[CR_EIRR] &= ~val; in HELPER()
95 CPUHPPAState *env = &cpu->env; in hppa_cpu_do_interrupt()
96 int i = cs->exception_index; in hppa_cpu_do_interrupt()
99 /* As documented in pa2.0 -- interruption handling. */ in hppa_cpu_do_interrupt()
101 env->cr[CR_IPSW] = old_psw = cpu_hppa_get_psw(env); in hppa_cpu_do_interrupt()
103 /* step 2 -- Note PSW_W is masked out again for pa1.x */ in hppa_cpu_do_interrupt()
105 (env->cr[CR_PSW_DEFAULT] & PDC_PSW_WIDE_BIT ? PSW_W : 0) | in hppa_cpu_do_interrupt()
111 * is disabled -- with PSW_W == 0, this will reduce to the space. in hppa_cpu_do_interrupt()
114 env->cr[CR_IIASQ] = in hppa_cpu_do_interrupt()
115 hppa_form_gva_psw(old_psw, env->iasq_f, env->iaoq_f) >> 32; in hppa_cpu_do_interrupt()
116 env->cr_back[0] = in hppa_cpu_do_interrupt()
117 hppa_form_gva_psw(old_psw, env->iasq_b, env->iaoq_b) >> 32; in hppa_cpu_do_interrupt()
119 env->cr[CR_IIASQ] = 0; in hppa_cpu_do_interrupt()
120 env->cr_back[0] = 0; in hppa_cpu_do_interrupt()
124 env->cr[CR_IIAOQ] = env->iaoq_f; in hppa_cpu_do_interrupt()
125 env->cr_back[1] = env->iaoq_b; in hppa_cpu_do_interrupt()
127 env->cr[CR_IIAOQ] = (uint32_t)env->iaoq_f; in hppa_cpu_do_interrupt()
128 env->cr_back[1] = (uint32_t)env->iaoq_b; in hppa_cpu_do_interrupt()
159 /* ??? An alternate fool-proof method would be to store the in hppa_cpu_do_interrupt()
162 vaddr vaddr = env->iaoq_f & -4; in hppa_cpu_do_interrupt()
168 vaddr = hppa_form_gva_psw(old_psw, env->iasq_f, vaddr); in hppa_cpu_do_interrupt()
172 /* We can't re-load the instruction. */ in hppa_cpu_do_interrupt()
173 env->cr[CR_IIR] = 0; in hppa_cpu_do_interrupt()
177 env->cr[CR_IIR] = ldl_phys(cs->as, paddr); in hppa_cpu_do_interrupt()
187 env->shadow[0] = env->gr[1]; in hppa_cpu_do_interrupt()
188 env->shadow[1] = env->gr[8]; in hppa_cpu_do_interrupt()
189 env->shadow[2] = env->gr[9]; in hppa_cpu_do_interrupt()
190 env->shadow[3] = env->gr[16]; in hppa_cpu_do_interrupt()
191 env->shadow[4] = env->gr[17]; in hppa_cpu_do_interrupt()
192 env->shadow[5] = env->gr[24]; in hppa_cpu_do_interrupt()
193 env->shadow[6] = env->gr[25]; in hppa_cpu_do_interrupt()
198 env->iaoq_f = hppa_form_gva(env, 0, FIRMWARE_START); in hppa_cpu_do_interrupt()
200 env->gr[24] = env->cr_back[0]; in hppa_cpu_do_interrupt()
201 env->gr[25] = env->cr_back[1]; in hppa_cpu_do_interrupt()
203 env->iaoq_f = hppa_form_gva(env, 0, env->cr[CR_IVA] + 32 * i); in hppa_cpu_do_interrupt()
205 env->iaoq_b = hppa_form_gva(env, 0, env->iaoq_f + 4); in hppa_cpu_do_interrupt()
206 env->iasq_f = 0; in hppa_cpu_do_interrupt()
207 env->iasq_b = 0; in hppa_cpu_do_interrupt()
224 [EXCP_ASSIST] = "assist exception trap", in hppa_cpu_do_interrupt()
226 [EXCP_NA_ITLB_MISS] = "non-access instruction tlb miss", in hppa_cpu_do_interrupt()
227 [EXCP_NA_DTLB_MISS] = "non-access data tlb miss", in hppa_cpu_do_interrupt()
232 [EXCP_ASSIST_EMU] = "assist emulation trap", in hppa_cpu_do_interrupt()
233 [EXCP_HPT] = "high-privilege transfer trap", in hppa_cpu_do_interrupt()
234 [EXCP_LPT] = "low-privilege transfer trap", in hppa_cpu_do_interrupt()
241 [EXCP_SYSCALL_LWS] = "syscall-lws", in hppa_cpu_do_interrupt()
253 fprintf(logfile, "INT: cpu %d %s\n", cs->cpu_index, name); in hppa_cpu_do_interrupt()
255 fprintf(logfile, "INT: cpu %d unknown %d\n", cs->cpu_index, i); in hppa_cpu_do_interrupt()
261 cs->exception_index = -1; in hppa_cpu_do_interrupt()
267 CPUHPPAState *env = &cpu->env; in hppa_cpu_exec_interrupt()
272 cs->exception_index = EXCP_TOC; in hppa_cpu_exec_interrupt()
279 && (env->psw & PSW_I) in hppa_cpu_exec_interrupt()
280 && (env->cr[CR_EIRR] & env->cr[CR_EIEM])) { in hppa_cpu_exec_interrupt()
281 cs->exception_index = EXCP_EXT_INTERRUPT; in hppa_cpu_exec_interrupt()