Lines Matching full:ea
203 if ((EA) & (MASK)) {
204 warn("aligning misaligned vector. PC=%08x EA=%08x",thread->Regs[REG_PC],(EA));
351 GATHER_FUNCTION(EA,OFFSET,IDX, LEN, 4, IDX, 1);
357 GATHER_FUNCTION(EA,OFFSET,IDX, LEN, 2, IDX, 1);
363 GATHER_FUNCTION(EA,OFFSET,IDX, LEN, 2, (2*IDX2+IDX_H), 1);
369 GATHER_FUNCTION(EA,OFFSET,IDX, LEN, 4, IDX, fGETQBIT(QsV,4*IDX+i0));
375 GATHER_FUNCTION(EA,OFFSET,IDX, LEN, 2, IDX, fGETQBIT(QsV,2*IDX+i0));
382 GATHER_FUNCTION(EA,OFFSET,IDX, LEN, 2, (2*IDX2+IDX_H), fGETQBIT(QsV,2*IDX+i0));
454 SCATTER_FUNCTION (EA,OFFSET,IDX, LEN, 2, IDX, 1, IN);
460 SCATTER_FUNCTION (EA,OFFSET,IDX, LEN, 4, IDX, 1, IN);
467 SCATTER_FUNCTION (EA,OFFSET,IDX, LEN, 2, IDX, fGETQBIT(QsV,2*IDX+i0), IN);
473 SCATTER_FUNCTION (EA,OFFSET,IDX, LEN, 4, IDX, fGETQBIT(QsV,4*IDX+i0), IN);
484 SCATTER_FUNCTION (EA,OFFSET,IDX, LEN, 2, (2*IDX2+IDX_H), 1, IN);
491 SCATTER_FUNCTION (EA,OFFSET,IDX, LEN, 2, (2*IDX2+IDX_H), fGETQBIT(QsV,2*IDX+i0), IN);
503 fV_AL_CHECK(EA,fVECSIZE()-1);
505 …mem_store_release(thread, insn, fVECSIZE(), EA&~(fVECSIZE()-1), EA, TYPE, fUSE_LOOKUP_ADDRESS_BY_R…
512 fV_AL_CHECK(EA,fVECSIZE()-1);
513 mem_fetch_vector(thread, insn, EA&~(fVECSIZE()-1), insn->slot, fVECSIZE());
521 fV_AL_CHECK(EA,ALIGNMENT-1);
523 …mem_load_vector_oddva(thread, insn, EA&~(ALIGNMENT-1), EA, insn->slot, LEN, &DST.ub[0], LEN, fUSE_…
529 fLOADMMV_AL(EA,fVECSIZE(),fVECSIZE(),DST),
536 fLOADMMV_AL(EA,fVECSIZE(),fVECSIZE(),DST);
545 fLOADMMV_AL(EA,fVECSIZE(),fVECSIZE(),DST);
553 size4u_t size2 = (EA)&(ALIGNMENT-1);
556 …mem_load_vector_oddva(thread, insn, EA+size1, EA+fVECSIZE(), /* slot */ 1, size2, &DST.ub[size1], …
557 …mem_load_vector_oddva(thread, insn, EA, EA,/* slot */ 0, size1, &DST.ub[0], size1, fUSE_LOOKUP_ADD…
567 if ( (EA & (fVECSIZE()-1)) == 0) {
571 fLOADMMV_AL(EA,fVECSIZE(),fVECSIZE(),DST);
576 fLOADMMVU_AL(EA,fVECSIZE(),fVECSIZE(),DST);
584 fV_AL_CHECK(EA,ALIGNMENT-1);
585 …mem_store_vector_oddva(thread, insn, EA&~(ALIGNMENT-1), EA, insn->slot, LEN, &SRC.ub[0], 0, 0, fUS…
591 fSTOREMMV_AL(EA,fVECSIZE(),fVECSIZE(),SRC),
600 …mem_store_vector_oddva(thread, insn, EA&~(ALIGNMENT-1), EA, insn->slot, LEN, &SRC.ub[0], &maskvec.…
606 fSTOREMMVQ_AL(EA,fVECSIZE(),fVECSIZE(),SRC,MASK),
615 fV_AL_CHECK(EA,ALIGNMENT-1);
616 …mem_store_vector_oddva(thread, insn, EA&~(ALIGNMENT-1), EA, insn->slot, LEN, &SRC.ub[0], &maskvec.…
622 fSTOREMMVNQ_AL(EA,fVECSIZE(),fVECSIZE(),SRC,MASK),
628 size4u_t size1 = ALIGNMENT-((EA)&(ALIGNMENT-1));
632 …mem_store_vector_oddva(thread, insn, EA+size1, EA+fVECSIZE(), /* slot */ 1, size2, &SRC.ub[size1],…
633 …mem_store_vector_oddva(thread, insn, EA, EA, /* slot */ 0, size1, &SRC.ub[0], 0, 0, fUSE_LOOKUP_AD…
642 if ( (EA & (fVECSIZE()-1)) == 0) {
644 fSTOREMMV_AL(EA,fVECSIZE(),fVECSIZE(),SRC);
648 fSTOREMMVU_AL(EA,fVECSIZE(),fVECSIZE(),SRC);
656 size4u_t size1 = ALIGNMENT-((EA)&(ALIGNMENT-1));
663 …mem_store_vector_oddva(thread, insn, EA+size1, EA+fVECSIZE(),/* slot */ 1, size2, &SRC.ub[size1], …
664 …mem_store_vector_oddva(thread, insn, EA, /* slot */ 0, size1, &SRC.ub[0], &maskvec.ub[0], 0, fUSE_…
673 if ( (EA & (fVECSIZE()-1)) == 0) {
675 fSTOREMMVQ_AL(EA,fVECSIZE(),fVECSIZE(),SRC,MASK);
679 fSTOREMMVQU_AL(EA,fVECSIZE(),fVECSIZE(),SRC,MASK);
687 size4u_t size1 = ALIGNMENT-((EA)&(ALIGNMENT-1));
694 …mem_store_vector_oddva(thread, insn, EA+size1, EA+fVECSIZE(), /* slot */ 1, size2, &SRC.ub[size1],…
695 …mem_store_vector_oddva(thread, insn, EA, EA, /* slot */ 0, size1, &SRC.ub[0], &maskvec.ub[0], 1, f…
704 if ( (EA & (fVECSIZE()-1)) == 0) {
706 fSTOREMMVNQ_AL(EA,fVECSIZE(),fVECSIZE(),SRC,MASK);
710 fSTOREMMVNQU_AL(EA,fVECSIZE(),fVECSIZE(),SRC,MASK);