hexagon/imported/macros.def

806       DST = fMIN(maxv,fMAX(SRC,minv));
988 …(((SHAMT) < 0) ? ((fCAST##REGSTYPE(SRC) >> ((-(SHAMT))-1)) >>1) : (fCAST##REGSTYPE(SRC) << (SHAMT)…
994     fBIDIR_SHIFTL(SRC,SHAMT,REGSTYPE##s),
1000     fBIDIR_SHIFTL(SRC,SHAMT,REGSTYPE##u),
1006 …HAMT) < 0) ? ((fCAST##REGSTYPE##s(SRC) >> ((-(SHAMT))-1)) >>1) : fSAT_ORIG_SHL(fCAST##REGSTYPE##s(…
1013 …(((SHAMT) < 0) ? ((fCAST##REGSTYPE(SRC) << ((-(SHAMT))-1)) << 1) : (fCAST##REGSTYPE(SRC) >> (SHAMT…
1019     fBIDIR_SHIFTR(SRC,SHAMT,REGSTYPE##s),
1025     fBIDIR_SHIFTR(SRC,SHAMT,REGSTYPE##u),
1031 …AMT) < 0) ? fSAT_ORIG_SHL((fCAST##REGSTYPE##s(SRC) << ((-(SHAMT))-1)) << 1,(SRC)) : (fCAST##REGSTY…
1037     (fCAST##REGSTYPE##s(SRC) >> (SHAMT)),
1043     (((SHAMT) >= 64)?0:(fCAST##REGSTYPE##u(SRC) >> (SHAMT))),
1049     (((SHAMT)==0) ? (SRC) : ((fCAST##REGSTYPE##u(SRC) << (SHAMT)) | \
1050         ((fCAST##REGSTYPE##u(SRC) >> ((sizeof(SRC)*8)-(SHAMT)))))),
1056     (((SHAMT)==0) ? (SRC) : ((fCAST##REGSTYPE##u(SRC) >> (SHAMT)) | \
1057         ((fCAST##REGSTYPE##u(SRC) << ((sizeof(SRC)*8)-(SHAMT)))))),
1063     (((SHAMT) >= 64)?0:(fCAST##REGSTYPE##s(SRC) << (SHAMT))),
1372     { MEM_STORE##SIZE(thread,EA,SRC,insn); },
1378     { PRED = (mem_store_conditional(thread,EA,SRC,SIZE,insn) ? 0xff : 0); },
1387     ((size1s_t)((SRC>>((N)*8))&0xff)),
1392     ((size1u_t)((SRC>>((N)*8))&0xff)),
1404     ((size2s_t)((SRC>>((N)*16))&0xffff)),
1409     ((size2u_t)((SRC>>((N)*16))&0xffff)),
1423     ((size8s_t)((size4s_t)((SRC>>((N)*32))&0x0ffffffffLL))),
1428     ((size8u_t)((size4u_t)((SRC>>((N)*32))&0x0ffffffffLL))),
1447     (((SRC)>>N)&1),