target/avr/cpu.h

107 typedef struct CPUArchState {  struct
108     uint32_t pc_w; /* 0x003fffff up to 22 bits */
110     uint32_t sregC; /* 0x00000001 1 bit */
111     uint32_t sregZ; /* 0x00000001 1 bit */
112     uint32_t sregN; /* 0x00000001 1 bit */
113     uint32_t sregV; /* 0x00000001 1 bit */
114     uint32_t sregS; /* 0x00000001 1 bit */
115     uint32_t sregH; /* 0x00000001 1 bit */
116     uint32_t sregT; /* 0x00000001 1 bit */
117     uint32_t sregI; /* 0x00000001 1 bit */
119     uint32_t rampD; /* 0x00ff0000 8 bits */
120     uint32_t rampX; /* 0x00ff0000 8 bits */
121     uint32_t rampY; /* 0x00ff0000 8 bits */
122     uint32_t rampZ; /* 0x00ff0000 8 bits */
123     uint32_t eind; /* 0x00ff0000 8 bits */
125     uint32_t r[NUMBER_OF_CPU_REGISTERS]; /* 8 bits each */
126     uint32_t sp; /* 16 bits */
128     uint32_t skip; /* if set skip instruction */
130     uint64_t intsrc; /* interrupt sources */
131     bool fullacc; /* CPU/MEM if true MEM only otherwise */
133     uint64_t features;