2682 static bool msr_banked_access_decode(DisasContext *s, int r, int sysm, int rn,  in msr_banked_access_decode()  argument
2721         switch (sysm) {  in msr_banked_access_decode()
2750         switch (sysm) {  in msr_banked_access_decode()
2753             *regno = sysm + 8;  in msr_banked_access_decode()
2757             *regno = sysm;  in msr_banked_access_decode()
2761             *regno = sysm & 1 ? 13 : 14;  in msr_banked_access_decode()
2765             *regno = sysm & 1 ? 13 : 14;  in msr_banked_access_decode()
2769             *regno = sysm & 1 ? 13 : 14;  in msr_banked_access_decode()
2773             *regno = sysm & 1 ? 13 : 14;  in msr_banked_access_decode()
2777             *regno = sysm & 1 ? 13 : 14;  in msr_banked_access_decode()
2782             *regno = sysm & 1 ? 13 : 17;  in msr_banked_access_decode()
2850 static void gen_msr_banked(DisasContext *s, int r, int sysm, int rn)  in gen_msr_banked()  argument
2855     if (!msr_banked_access_decode(s, r, sysm, rn, &tgtmode, &regno)) {  in gen_msr_banked()
2869 static void gen_mrs_banked(DisasContext *s, int r, int sysm, int rn)  in gen_mrs_banked()  argument
2874     if (!msr_banked_access_decode(s, r, sysm, rn, &tgtmode, &regno)) {  in gen_mrs_banked()
4618     gen_mrs_banked(s, a->r, a->sysm, a->rd);  in DO_CRC32()
4627     gen_msr_banked(s, a->r, a->sysm, a->rn);  in trans_MSR_bank()
4675     gen_helper_v7m_mrs(tmp, tcg_env, tcg_constant_i32(a->sysm));  in trans_MRS_v7m()
4687     addr = tcg_constant_i32((a->mask << 10) | a->sysm);  in trans_MSR_v7m()