50 TCGv_i32 cpu_CF, cpu_NF, cpu_VF, cpu_ZF;  variable
69     cpu_CF = tcg_global_mem_new_i32(tcg_env, offsetof(CPUARMState, CF), "CF");  in arm_translate_init()
468     tcg_gen_add_i32(dest, dest, cpu_CF);  in gen_add_carry()
475     tcg_gen_add_i32(dest, dest, cpu_CF);  in gen_sub_carry()
484     tcg_gen_add2_i32(cpu_NF, cpu_CF, t0, tmp, t1, tmp);  in gen_add_CC()
498         tcg_gen_add2_i32(cpu_NF, cpu_CF, t0, tmp, cpu_CF, tmp);  in gen_adc_CC()
499         tcg_gen_add2_i32(cpu_NF, cpu_CF, cpu_NF, cpu_CF, t1, tmp);  in gen_adc_CC()
506         tcg_gen_extu_i32_i64(q1, cpu_CF);  in gen_adc_CC()
508         tcg_gen_extr_i64_i32(cpu_NF, cpu_CF, q0);  in gen_adc_CC()
523     tcg_gen_setcond_i32(TCG_COND_GEU, cpu_CF, t0, t1);  in gen_sub_CC()
565     tcg_gen_extract_i32(cpu_CF, var, shift, 1);  in shifter_out_im()
583                 tcg_gen_shri_i32(cpu_CF, var, 31);  in gen_arm_shift_im()
608             tcg_gen_shli_i32(tmp, cpu_CF, 31);  in gen_arm_shift_im()
663         value = cpu_CF;  in arm_test_cc()
684         tcg_gen_neg_i32(value, cpu_CF);  in arm_test_cc()
3800         tcg_gen_movi_i32(cpu_CF, imm >> 31);  in op_s_rri_rot()
3821         tcg_gen_movi_i32(cpu_CF, imm >> 31);  in op_s_rxi_rot()