Lines Matching refs:tmp2
408 TCGv_i32 tmp2 = tcg_temp_new_i32(); in gen_smul_dual() local
410 tcg_gen_ext16s_i32(tmp2, b); in gen_smul_dual()
411 tcg_gen_mul_i32(tmp1, tmp1, tmp2); in gen_smul_dual()
1486 TCGv_i32 tmp, tmp2, tmp3; in disas_iwmmxt_insn() local
1595 tmp2 = load_reg(s, rd); in disas_iwmmxt_insn()
1596 tcg_gen_andc_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1821 tmp2 = tcg_constant_i32(0xff); in disas_iwmmxt_insn()
1825 tmp2 = tcg_constant_i32(0xffff); in disas_iwmmxt_insn()
1829 tmp2 = tcg_constant_i32(0xffffffff); in disas_iwmmxt_insn()
1835 gen_helper_iwmmxt_insr(cpu_M0, cpu_M0, tmp, tmp2, tmp3); in disas_iwmmxt_insn()
1914 tmp2 = tcg_temp_new_i32(); in disas_iwmmxt_insn()
1915 tcg_gen_mov_i32(tmp2, tmp); in disas_iwmmxt_insn()
1919 tcg_gen_shli_i32(tmp2, tmp2, 4); in disas_iwmmxt_insn()
1920 tcg_gen_and_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1925 tcg_gen_shli_i32(tmp2, tmp2, 8); in disas_iwmmxt_insn()
1926 tcg_gen_and_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1930 tcg_gen_shli_i32(tmp2, tmp2, 16); in disas_iwmmxt_insn()
1931 tcg_gen_and_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1960 tmp2 = tcg_temp_new_i32(); in disas_iwmmxt_insn()
1961 tcg_gen_mov_i32(tmp2, tmp); in disas_iwmmxt_insn()
1965 tcg_gen_shli_i32(tmp2, tmp2, 4); in disas_iwmmxt_insn()
1966 tcg_gen_or_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1971 tcg_gen_shli_i32(tmp2, tmp2, 8); in disas_iwmmxt_insn()
1972 tcg_gen_or_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1976 tcg_gen_shli_i32(tmp2, tmp2, 16); in disas_iwmmxt_insn()
1977 tcg_gen_or_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
2424 tmp2 = load_reg(s, rd1); in disas_iwmmxt_insn()
2427 gen_helper_iwmmxt_muladdsl(cpu_M0, cpu_M0, tmp, tmp2); in disas_iwmmxt_insn()
2430 gen_helper_iwmmxt_muladdsw(cpu_M0, cpu_M0, tmp, tmp2); in disas_iwmmxt_insn()
2436 tcg_gen_shri_i32(tmp2, tmp2, 16); in disas_iwmmxt_insn()
2437 gen_helper_iwmmxt_muladdswl(cpu_M0, cpu_M0, tmp, tmp2); in disas_iwmmxt_insn()
2457 TCGv_i32 tmp, tmp2; in disas_dsp_insn() local
2469 tmp2 = load_reg(s, rd1); in disas_dsp_insn()
2472 gen_helper_iwmmxt_muladdsl(cpu_M0, cpu_M0, tmp, tmp2); in disas_dsp_insn()
2475 gen_helper_iwmmxt_muladdsw(cpu_M0, cpu_M0, tmp, tmp2); in disas_dsp_insn()
2484 tcg_gen_shri_i32(tmp2, tmp2, 16); in disas_dsp_insn()
2485 gen_helper_iwmmxt_muladdswl(cpu_M0, cpu_M0, tmp, tmp2); in disas_dsp_insn()
3269 TCGv_i32 tmp2 = tcg_temp_new_i32(); in gen_load_exclusive() local
3285 tcg_gen_extr_i64_i32(tmp2, tmp, t64); in gen_load_exclusive()
3287 tcg_gen_extr_i64_i32(tmp, tmp2, t64); in gen_load_exclusive()
3289 store_reg(s, rt2, tmp2); in gen_load_exclusive()
3706 TCGv_i32 tmp1, tmp2; in op_s_rrr_shi() local
3708 tmp2 = load_reg(s, a->rm); in op_s_rrr_shi()
3709 gen_arm_shift_im(tmp2, a->shty, a->shim, logic_cc); in op_s_rrr_shi()
3712 gen(tmp1, tmp1, tmp2); in op_s_rrr_shi()
3746 TCGv_i32 tmp1, tmp2; in op_s_rrr_shr() local
3749 tmp2 = load_reg(s, a->rm); in op_s_rrr_shr()
3750 gen_arm_shift_reg(tmp2, a->shty, tmp1, logic_cc); in op_s_rrr_shr()
3753 gen(tmp1, tmp1, tmp2); in op_s_rrr_shr()
3765 TCGv_i32 tmp1, tmp2; in op_s_rxr_shr() local
3768 tmp2 = load_reg(s, a->rm); in op_s_rxr_shr()
3769 gen_arm_shift_reg(tmp2, a->shty, tmp1, logic_cc); in op_s_rxr_shr()
3771 gen(tmp2, tmp2); in op_s_rxr_shr()
3773 gen_logic_CC(tmp2); in op_s_rxr_shr()
3775 return store_reg_kind(s, a->rd, tmp2, kind); in op_s_rxr_shr()
5899 TCGv_i32 tmp2 = load_reg(s, a->rn); in op_xta() local
5900 gen_add(tmp, tmp, tmp2); in op_xta()