Lines Matching full:a
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * You should have received a copy of the GNU Lesser General Public
215 static bool trans_VCMLA(DisasContext *s, arg_VCMLA *a) in trans_VCMLA() argument
220 if (a->size == MO_16) { in trans_VCMLA()
224 return do_neon_ddda_fpst(s, a->q * 7, a->vd, a->vn, a->vm, a->rot, in trans_VCMLA()
227 return do_neon_ddda_fpst(s, a->q * 7, a->vd, a->vn, a->vm, a->rot, in trans_VCMLA()
231 static bool trans_VCADD(DisasContext *s, arg_VCADD *a) in trans_VCADD() argument
238 || (a->size == MO_16 && !dc_isar_feature(aa32_fp16_arith, s))) { in trans_VCADD()
244 ((a->vd | a->vn | a->vm) & 0x10)) { in trans_VCADD()
248 if ((a->vn | a->vm | a->vd) & a->q) { in trans_VCADD()
256 opr_sz = (1 + a->q) * 8; in trans_VCADD()
257 fpst = fpstatus_ptr(a->size == MO_16 ? FPST_STD_F16 : FPST_STD); in trans_VCADD()
258 fn_gvec_ptr = (a->size == MO_16) ? in trans_VCADD()
260 tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd), in trans_VCADD()
261 vfp_reg_offset(1, a->vn), in trans_VCADD()
262 vfp_reg_offset(1, a->vm), in trans_VCADD()
263 fpst, opr_sz, opr_sz, a->rot, in trans_VCADD()
268 static bool trans_VSDOT(DisasContext *s, arg_VSDOT *a) in trans_VSDOT() argument
273 return do_neon_ddda(s, a->q * 7, a->vd, a->vn, a->vm, 0, in trans_VSDOT()
277 static bool trans_VUDOT(DisasContext *s, arg_VUDOT *a) in trans_VUDOT() argument
282 return do_neon_ddda(s, a->q * 7, a->vd, a->vn, a->vm, 0, in trans_VUDOT()
286 static bool trans_VUSDOT(DisasContext *s, arg_VUSDOT *a) in trans_VUSDOT() argument
291 return do_neon_ddda(s, a->q * 7, a->vd, a->vn, a->vm, 0, in trans_VUSDOT()
295 static bool trans_VDOT_b16(DisasContext *s, arg_VDOT_b16 *a) in trans_VDOT_b16() argument
300 return do_neon_ddda_env(s, a->q * 7, a->vd, a->vn, a->vm, 0, in trans_VDOT_b16()
304 static bool trans_VFML(DisasContext *s, arg_VFML *a) in trans_VFML() argument
314 (a->vd & 0x10)) { in trans_VFML()
318 if (a->vd & a->q) { in trans_VFML()
326 opr_sz = (1 + a->q) * 8; in trans_VFML()
327 tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd), in trans_VFML()
328 vfp_reg_offset(a->q, a->vn), in trans_VFML()
329 vfp_reg_offset(a->q, a->vm), in trans_VFML()
330 tcg_env, opr_sz, opr_sz, a->s, /* is_2 == 0 */ in trans_VFML()
335 static bool trans_VCMLA_scalar(DisasContext *s, arg_VCMLA_scalar *a) in trans_VCMLA_scalar() argument
337 int data = (a->index << 2) | a->rot; in trans_VCMLA_scalar()
342 if (a->size == MO_16) { in trans_VCMLA_scalar()
346 return do_neon_ddda_fpst(s, a->q * 6, a->vd, a->vn, a->vm, data, in trans_VCMLA_scalar()
349 return do_neon_ddda_fpst(s, a->q * 6, a->vd, a->vn, a->vm, data, in trans_VCMLA_scalar()
353 static bool trans_VSDOT_scalar(DisasContext *s, arg_VSDOT_scalar *a) in trans_VSDOT_scalar() argument
358 return do_neon_ddda(s, a->q * 6, a->vd, a->vn, a->vm, a->index, in trans_VSDOT_scalar()
362 static bool trans_VUDOT_scalar(DisasContext *s, arg_VUDOT_scalar *a) in trans_VUDOT_scalar() argument
367 return do_neon_ddda(s, a->q * 6, a->vd, a->vn, a->vm, a->index, in trans_VUDOT_scalar()
371 static bool trans_VUSDOT_scalar(DisasContext *s, arg_VUSDOT_scalar *a) in trans_VUSDOT_scalar() argument
376 return do_neon_ddda(s, a->q * 6, a->vd, a->vn, a->vm, a->index, in trans_VUSDOT_scalar()
380 static bool trans_VSUDOT_scalar(DisasContext *s, arg_VSUDOT_scalar *a) in trans_VSUDOT_scalar() argument
385 return do_neon_ddda(s, a->q * 6, a->vd, a->vn, a->vm, a->index, in trans_VSUDOT_scalar()
389 static bool trans_VDOT_b16_scal(DisasContext *s, arg_VDOT_b16_scal *a) in trans_VDOT_b16_scal() argument
394 return do_neon_ddda_env(s, a->q * 6, a->vd, a->vn, a->vm, a->index, in trans_VDOT_b16_scal()
398 static bool trans_VFML_scalar(DisasContext *s, arg_VFML_scalar *a) in trans_VFML_scalar() argument
408 ((a->vd & 0x10) || (a->q && (a->vn & 0x10)))) { in trans_VFML_scalar()
412 if (a->vd & a->q) { in trans_VFML_scalar()
420 opr_sz = (1 + a->q) * 8; in trans_VFML_scalar()
421 tcg_gen_gvec_3_ptr(vfp_reg_offset(1, a->vd), in trans_VFML_scalar()
422 vfp_reg_offset(a->q, a->vn), in trans_VFML_scalar()
423 vfp_reg_offset(a->q, a->rm), in trans_VFML_scalar()
425 (a->index << 2) | a->s, /* is_2 == 0 */ in trans_VFML_scalar()
466 static bool trans_VLDST_multiple(DisasContext *s, arg_VLDST_multiple *a) in trans_VLDST_multiple() argument
472 int size = a->size; in trans_VLDST_multiple()
481 if (!dc_isar_feature(aa32_simd_r32, s) && (a->vd & 0x10)) { in trans_VLDST_multiple()
484 if (a->itype > 10) { in trans_VLDST_multiple()
488 switch (a->itype & 0xc) { in trans_VLDST_multiple()
490 if (a->align >= 2) { in trans_VLDST_multiple()
495 if (a->align == 3) { in trans_VLDST_multiple()
502 nregs = neon_ls_element_type[a->itype].nregs; in trans_VLDST_multiple()
503 interleave = neon_ls_element_type[a->itype].interleave; in trans_VLDST_multiple()
504 spacing = neon_ls_element_type[a->itype].spacing; in trans_VLDST_multiple()
520 if (a->align) { in trans_VLDST_multiple()
521 align = pow2_align(a->align + 2); /* 4 ** a->align */ in trans_VLDST_multiple()
527 * Consecutive little-endian elements from a single register in trans_VLDST_multiple()
528 * can be promoted to a larger little-endian operation. in trans_VLDST_multiple()
540 load_reg_var(s, addr, a->rn); in trans_VLDST_multiple()
547 int tt = a->vd + reg + spacing * xs; in trans_VLDST_multiple()
549 if (a->l) { in trans_VLDST_multiple()
564 gen_neon_ldst_base_update(s, a->rm, a->rn, nregs * interleave * 8); in trans_VLDST_multiple()
568 static bool trans_VLD_all_lanes(DisasContext *s, arg_VLD_all_lanes *a) in trans_VLD_all_lanes() argument
572 int vd = a->vd; in trans_VLD_all_lanes()
573 int size = a->size; in trans_VLD_all_lanes()
574 int nregs = a->n + 1; in trans_VLD_all_lanes()
583 if (!dc_isar_feature(aa32_simd_r32, s) && (a->vd & 0x10)) { in trans_VLD_all_lanes()
589 if (nregs != 4 || a->a == 0) { in trans_VLD_all_lanes()
592 /* For VLD4 size == 3 a == 1 means 32 bits at 16 byte alignment */ in trans_VLD_all_lanes()
595 } else if (a->a) { in trans_VLD_all_lanes()
628 stride = a->t ? 2 : 1; in trans_VLD_all_lanes()
633 load_reg_var(s, addr, a->rn); in trans_VLD_all_lanes()
656 gen_neon_ldst_base_update(s, a->rm, a->rn, (1 << size) * nregs); in trans_VLD_all_lanes()
661 static bool trans_VLDST_single(DisasContext *s, arg_VLDST_single *a) in trans_VLDST_single() argument
665 int nregs = a->n + 1; in trans_VLDST_single()
666 int vd = a->vd; in trans_VLDST_single()
675 if (!dc_isar_feature(aa32_simd_r32, s) && (a->vd & 0x10)) { in trans_VLDST_single()
679 /* Catch the UNDEF cases. This is unavoidably a bit messy. */ in trans_VLDST_single()
682 if (a->stride != 1) { in trans_VLDST_single()
685 if (((a->align & (1 << a->size)) != 0) || in trans_VLDST_single()
686 (a->size == 2 && (a->align == 1 || a->align == 2))) { in trans_VLDST_single()
691 if (a->size == 2 && (a->align & 2) != 0) { in trans_VLDST_single()
696 if (a->align != 0) { in trans_VLDST_single()
701 if (a->size == 2 && a->align == 3) { in trans_VLDST_single()
708 if ((vd + a->stride * (nregs - 1)) > 31) { in trans_VLDST_single()
722 mop = finalize_memop(s, a->size); in trans_VLDST_single()
724 if (a->align) { in trans_VLDST_single()
734 align_op = pow2_align(a->size + 1); in trans_VLDST_single()
737 if (a->size == MO_32) { in trans_VLDST_single()
742 align_op = pow2_align(a->size + a->align); in trans_VLDST_single()
745 align_op = pow2_align(a->size + 2); in trans_VLDST_single()
758 load_reg_var(s, addr, a->rn); in trans_VLDST_single()
761 if (a->l) { in trans_VLDST_single()
763 neon_store_element(vd, a->reg_idx, a->size, tmp); in trans_VLDST_single()
765 neon_load_element(tmp, vd, a->reg_idx, a->size); in trans_VLDST_single()
768 vd += a->stride; in trans_VLDST_single()
769 tcg_gen_addi_i32(addr, addr, 1 << a->size); in trans_VLDST_single()
775 gen_neon_ldst_base_update(s, a->rm, a->rn, (1 << a->size) * nregs); in trans_VLDST_single()
780 static bool do_3same(DisasContext *s, arg_3same *a, GVecGen3Fn fn) in do_3same() argument
782 int vec_size = a->q ? 16 : 8; in do_3same()
783 int rd_ofs = neon_full_reg_offset(a->vd); in do_3same()
784 int rn_ofs = neon_full_reg_offset(a->vn); in do_3same()
785 int rm_ofs = neon_full_reg_offset(a->vm); in do_3same()
793 ((a->vd | a->vn | a->vm) & 0x10)) { in do_3same()
797 if ((a->vn | a->vm | a->vd) & a->q) { in do_3same()
805 fn(a->size, rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size); in do_3same()
810 static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \
812 return do_3same(s, a, FUNC); \
850 static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \
852 if (a->size == 3) { \
855 return do_3same(s, a, FUNC); \
906 static bool trans_VMUL_p_3s(DisasContext *s, arg_3same *a)
908 if (a->size != 0) {
911 return do_3same(s, a, gen_VMUL_p_3s);
915 static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \
920 if (a->size != 1 && a->size != 2) { \
923 return do_3same(s, a, FUNC); \
931 static bool trans_##NAME##_3s(DisasContext *s, arg_3same *a) \ in DO_VQRDMLAH()
936 return do_3same(s, a, gen_##NAME##_3s); \ in DO_VQRDMLAH()
946 static bool trans_##NAME##_3s(DisasContext *s, arg_3same *a) \
951 return do_3same(s, a, gen_##NAME##_3s); \
961 * to create wrapper functions whose prototype is a NeonGenTwoOpFn()
962 * and which call a NeonGenTwoOpEnvFn().
971 static bool trans_##INSN##_3s(DisasContext *s, arg_3same *a) \
972 { return a->size >= 1 && a->size <= 2 && do_3same(s, a, FUNC); }
990 static bool trans_##INSN##_fp_3s(DisasContext *s, arg_3same *a) \
992 if (a->size == MO_16) { \
996 return do_3same(s, a, gen_##INSN##_fp16_3s); \
998 return do_3same(s, a, gen_##INSN##_fp32_3s); \
1028 static bool trans_VMAXNM_fp_3s(DisasContext *s, arg_3same *a)
1034 if (a->size == MO_16) {
1038 return do_3same(s, a, gen_VMAXNM_fp16_3s);
1040 return do_3same(s, a, gen_VMAXNM_fp32_3s);
1043 static bool trans_VMINNM_fp_3s(DisasContext *s, arg_3same *a) in trans_VMINNM_fp_3s() argument
1049 if (a->size == MO_16) { in trans_VMINNM_fp_3s()
1053 return do_3same(s, a, gen_VMINNM_fp16_3s); in trans_VMINNM_fp_3s()
1055 return do_3same(s, a, gen_VMINNM_fp32_3s); in trans_VMINNM_fp_3s()
1058 static bool do_vector_2sh(DisasContext *s, arg_2reg_shift *a, GVecGen2iFn *fn) in do_vector_2sh() argument
1060 /* Handle a 2-reg-shift insn which can be vectorized. */ in do_vector_2sh()
1061 int vec_size = a->q ? 16 : 8; in do_vector_2sh()
1062 int rd_ofs = neon_full_reg_offset(a->vd); in do_vector_2sh()
1063 int rm_ofs = neon_full_reg_offset(a->vm); in do_vector_2sh()
1071 ((a->vd | a->vm) & 0x10)) { in do_vector_2sh()
1075 if ((a->vm | a->vd) & a->q) { in do_vector_2sh()
1083 fn(a->size, rd_ofs, rm_ofs, a->shift, vec_size, vec_size); in do_vector_2sh()
1088 static bool trans_##INSN##_2sh(DisasContext *s, arg_2reg_shift *a) \
1090 return do_vector_2sh(s, a, FUNC); \
1108 static bool do_2shift_narrow_64(DisasContext *s, arg_2reg_shift *a, in DO_2SH()
1121 ((a->vd | a->vm) & 0x10)) { in DO_2SH()
1125 if (a->vm & 1) { in DO_2SH()
1134 * This is always a right shift, and the shiftfn is always a in DO_2SH()
1137 constimm = tcg_constant_i64(-a->shift); in DO_2SH()
1143 read_neon_element64(rm1, a->vm, 0, MO_64); in DO_2SH()
1144 read_neon_element64(rm2, a->vm, 1, MO_64); in DO_2SH()
1148 write_neon_element64(rd, a->vd, 0, MO_32); in DO_2SH()
1152 write_neon_element64(rd, a->vd, 1, MO_32); in DO_2SH()
1157 static bool do_2shift_narrow_32(DisasContext *s, arg_2reg_shift *a, in do_2shift_narrow_32() argument
1172 ((a->vd | a->vm) & 0x10)) { in do_2shift_narrow_32()
1176 if (a->vm & 1) { in do_2shift_narrow_32()
1185 * This is always a right shift, and the shiftfn is always a in do_2shift_narrow_32()
1189 if (a->size == 1) { in do_2shift_narrow_32()
1190 imm = (uint16_t)(-a->shift); in do_2shift_narrow_32()
1194 imm = -a->shift; in do_2shift_narrow_32()
1203 read_neon_element32(rm1, a->vm, 0, MO_32); in do_2shift_narrow_32()
1204 read_neon_element32(rm2, a->vm, 1, MO_32); in do_2shift_narrow_32()
1205 read_neon_element32(rm3, a->vm, 2, MO_32); in do_2shift_narrow_32()
1206 read_neon_element32(rm4, a->vm, 3, MO_32); in do_2shift_narrow_32()
1215 write_neon_element64(rtmp, a->vd, 0, MO_32); in do_2shift_narrow_32()
1223 write_neon_element64(rtmp, a->vd, 1, MO_32); in do_2shift_narrow_32()
1228 static bool trans_##INSN##_2sh(DisasContext *s, arg_2reg_shift *a) \
1230 return do_2shift_narrow_64(s, a, FUNC, NARROWFUNC); \
1233 static bool trans_##INSN##_2sh(DisasContext *s, arg_2reg_shift *a) \
1235 return do_2shift_narrow_32(s, a, FUNC, NARROWFUNC); \
1284 static bool do_vshll_2sh(DisasContext *s, arg_2reg_shift *a, in DO_2SN_64()
1297 ((a->vd | a->vm) & 0x10)) { in DO_2SN_64()
1301 if (a->vd & 1) { in DO_2SN_64()
1310 * This is a widen-and-shift operation. The shift is always less in DO_2SN_64()
1315 * neighbour narrow input. Calculate a mask of bits to clear. in DO_2SN_64()
1317 if ((a->shift != 0) && (a->size < 2 || u)) { in DO_2SN_64()
1318 int esize = 8 << a->size; in DO_2SN_64()
1320 widen_mask >>= esize - a->shift; in DO_2SN_64()
1321 widen_mask = dup_const(a->size + 1, widen_mask); in DO_2SN_64()
1326 read_neon_element32(rm0, a->vm, 0, MO_32); in DO_2SN_64()
1327 read_neon_element32(rm1, a->vm, 1, MO_32); in DO_2SN_64()
1331 if (a->shift != 0) { in DO_2SN_64()
1332 tcg_gen_shli_i64(tmp, tmp, a->shift); in DO_2SN_64()
1335 write_neon_element64(tmp, a->vd, 0, MO_64); in DO_2SN_64()
1338 if (a->shift != 0) { in DO_2SN_64()
1339 tcg_gen_shli_i64(tmp, tmp, a->shift); in DO_2SN_64()
1342 write_neon_element64(tmp, a->vd, 1, MO_64); in DO_2SN_64()
1346 static bool trans_VSHLL_S_2sh(DisasContext *s, arg_2reg_shift *a) in trans_VSHLL_S_2sh() argument
1353 return do_vshll_2sh(s, a, widenfn[a->size], false); in trans_VSHLL_S_2sh()
1356 static bool trans_VSHLL_U_2sh(DisasContext *s, arg_2reg_shift *a) in trans_VSHLL_U_2sh() argument
1363 return do_vshll_2sh(s, a, widenfn[a->size], true); in trans_VSHLL_U_2sh()
1366 static bool do_fp_2sh(DisasContext *s, arg_2reg_shift *a, in do_fp_2sh() argument
1370 int vec_size = a->q ? 16 : 8; in do_fp_2sh()
1371 int rd_ofs = neon_full_reg_offset(a->vd); in do_fp_2sh()
1372 int rm_ofs = neon_full_reg_offset(a->vm); in do_fp_2sh()
1379 if (a->size == MO_16) { in do_fp_2sh()
1387 ((a->vd | a->vm) & 0x10)) { in do_fp_2sh()
1391 if ((a->vm | a->vd) & a->q) { in do_fp_2sh()
1399 fpst = fpstatus_ptr(a->size == MO_16 ? FPST_STD_F16 : FPST_STD); in do_fp_2sh()
1400 tcg_gen_gvec_2_ptr(rd_ofs, rm_ofs, fpst, vec_size, vec_size, a->shift, fn); in do_fp_2sh()
1405 static bool trans_##INSN##_2sh(DisasContext *s, arg_2reg_shift *a) \
1407 return do_fp_2sh(s, a, FUNC); \
1420 static bool do_1reg_imm(DisasContext *s, arg_1reg_imm *a, in DO_FP_2SH()
1431 if (!dc_isar_feature(aa32_simd_r32, s) && (a->vd & 0x10)) { in DO_FP_2SH()
1435 if (a->vd & a->q) { in DO_FP_2SH()
1443 reg_ofs = neon_full_reg_offset(a->vd); in DO_FP_2SH()
1444 vec_size = a->q ? 16 : 8; in DO_FP_2SH()
1445 imm = asimd_imm_const(a->imm, a->cmode, a->op); in DO_FP_2SH()
1457 static bool trans_Vimm_1r(DisasContext *s, arg_1reg_imm *a) in trans_Vimm_1r() argument
1462 if ((a->cmode & 1) && a->cmode < 12) { in trans_Vimm_1r()
1464 fn = a->op ? tcg_gen_gvec_andi : tcg_gen_gvec_ori; in trans_Vimm_1r()
1467 if (a->cmode == 15 && a->op == 1) { in trans_Vimm_1r()
1472 return do_1reg_imm(s, a, fn); in trans_Vimm_1r()
1475 static bool do_prewiden_3d(DisasContext *s, arg_3diff *a, in do_prewiden_3d() argument
1489 ((a->vd | a->vn | a->vm) & 0x10)) { in do_prewiden_3d()
1498 if ((a->vd & 1) || (src1_mop == MO_UQ && (a->vn & 1))) { in do_prewiden_3d()
1511 read_neon_element64(rn0_64, a->vn, 0, src1_mop); in do_prewiden_3d()
1514 read_neon_element32(tmp, a->vn, 0, MO_32); in do_prewiden_3d()
1518 read_neon_element64(rm_64, a->vm, 0, src2_mop); in do_prewiden_3d()
1521 read_neon_element32(tmp, a->vm, 0, MO_32); in do_prewiden_3d()
1529 * avoid incorrect results if a narrow input overlaps with the result. in do_prewiden_3d()
1532 read_neon_element64(rn1_64, a->vn, 1, src1_mop); in do_prewiden_3d()
1535 read_neon_element32(tmp, a->vn, 1, MO_32); in do_prewiden_3d()
1539 read_neon_element64(rm_64, a->vm, 1, src2_mop); in do_prewiden_3d()
1542 read_neon_element32(tmp, a->vm, 1, MO_32); in do_prewiden_3d()
1546 write_neon_element64(rn0_64, a->vd, 0, MO_64); in do_prewiden_3d()
1549 write_neon_element64(rn1_64, a->vd, 1, MO_64); in do_prewiden_3d()
1555 static bool trans_##INSN##_3d(DisasContext *s, arg_3diff *a) \
1568 int narrow_mop = a->size == MO_32 ? MO_32 | SIGN : -1; \
1569 return do_prewiden_3d(s, a, widenfn[a->size], addfn[a->size], \
1583 static bool do_narrow_3d(DisasContext *s, arg_3diff *a, in DO_PREWIDEN()
1596 ((a->vd | a->vn | a->vm) & 0x10)) { in DO_PREWIDEN()
1605 if ((a->vn | a->vm) & 1) { in DO_PREWIDEN()
1618 read_neon_element64(rn_64, a->vn, 0, MO_64); in DO_PREWIDEN()
1619 read_neon_element64(rm_64, a->vm, 0, MO_64); in DO_PREWIDEN()
1625 read_neon_element64(rn_64, a->vn, 1, MO_64); in DO_PREWIDEN()
1626 read_neon_element64(rm_64, a->vm, 1, MO_64); in DO_PREWIDEN()
1632 write_neon_element32(rd0, a->vd, 0, MO_32); in DO_PREWIDEN()
1633 write_neon_element32(rd1, a->vd, 1, MO_32); in DO_PREWIDEN()
1639 static bool trans_##INSN##_3d(DisasContext *s, arg_3diff *a) \
1653 return do_narrow_3d(s, a, addfn[a->size], narrowfn[a->size]); \
1667 static bool do_long_3d(DisasContext *s, arg_3diff *a, in DO_NARROW_3D()
1673 * These perform an operation on two inputs that returns a double-width in DO_NARROW_3D()
1686 ((a->vd | a->vn | a->vm) & 0x10)) { in DO_NARROW_3D()
1695 if (a->vd & 1) { in DO_NARROW_3D()
1708 read_neon_element32(rn, a->vn, 0, MO_32); in DO_NARROW_3D()
1709 read_neon_element32(rm, a->vm, 0, MO_32); in DO_NARROW_3D()
1712 read_neon_element32(rn, a->vn, 1, MO_32); in DO_NARROW_3D()
1713 read_neon_element32(rm, a->vm, 1, MO_32); in DO_NARROW_3D()
1719 read_neon_element64(tmp, a->vd, 0, MO_64); in DO_NARROW_3D()
1721 read_neon_element64(tmp, a->vd, 1, MO_64); in DO_NARROW_3D()
1725 write_neon_element64(rd0, a->vd, 0, MO_64); in DO_NARROW_3D()
1726 write_neon_element64(rd1, a->vd, 1, MO_64); in DO_NARROW_3D()
1731 static bool trans_VABDL_S_3d(DisasContext *s, arg_3diff *a) in trans_VABDL_S_3d() argument
1740 return do_long_3d(s, a, opfn[a->size], NULL); in trans_VABDL_S_3d()
1743 static bool trans_VABDL_U_3d(DisasContext *s, arg_3diff *a) in trans_VABDL_U_3d() argument
1752 return do_long_3d(s, a, opfn[a->size], NULL); in trans_VABDL_U_3d()
1755 static bool trans_VABAL_S_3d(DisasContext *s, arg_3diff *a) in trans_VABAL_S_3d() argument
1770 return do_long_3d(s, a, opfn[a->size], addfn[a->size]); in trans_VABAL_S_3d()
1773 static bool trans_VABAL_U_3d(DisasContext *s, arg_3diff *a) in trans_VABAL_U_3d() argument
1788 return do_long_3d(s, a, opfn[a->size], addfn[a->size]); in trans_VABAL_U_3d()
1809 static bool trans_VMULL_S_3d(DisasContext *s, arg_3diff *a) in trans_VMULL_S_3d() argument
1818 return do_long_3d(s, a, opfn[a->size], NULL); in trans_VMULL_S_3d()
1821 static bool trans_VMULL_U_3d(DisasContext *s, arg_3diff *a) in trans_VMULL_U_3d() argument
1830 return do_long_3d(s, a, opfn[a->size], NULL); in trans_VMULL_U_3d()
1834 static bool trans_##INSN##_3d(DisasContext *s, arg_3diff *a) \
1848 return do_long_3d(s, a, opfn[a->size], accfn[a->size]); \
1868 static bool trans_VQDMULL_3d(DisasContext *s, arg_3diff *a) in trans_VQDMULL_3d() argument
1877 return do_long_3d(s, a, opfn[a->size], NULL); in trans_VQDMULL_3d()
1890 static bool trans_VQDMLAL_3d(DisasContext *s, arg_3diff *a) in trans_VQDMLAL_3d() argument
1905 return do_long_3d(s, a, opfn[a->size], accfn[a->size]); in trans_VQDMLAL_3d()
1920 static bool trans_VQDMLSL_3d(DisasContext *s, arg_3diff *a) in trans_VQDMLSL_3d() argument
1935 return do_long_3d(s, a, opfn[a->size], accfn[a->size]); in trans_VQDMLSL_3d()
1938 static bool trans_VMULL_P_3d(DisasContext *s, arg_3diff *a) in trans_VMULL_P_3d() argument
1948 ((a->vd | a->vn | a->vm) & 0x10)) { in trans_VMULL_P_3d()
1952 if (a->vd & 1) { in trans_VMULL_P_3d()
1956 switch (a->size) { in trans_VMULL_P_3d()
1974 tcg_gen_gvec_3_ool(neon_full_reg_offset(a->vd), in trans_VMULL_P_3d()
1975 neon_full_reg_offset(a->vn), in trans_VMULL_P_3d()
1976 neon_full_reg_offset(a->vm), in trans_VMULL_P_3d()
2013 static bool do_2scalar(DisasContext *s, arg_2scalar *a, in do_2scalar() argument
2017 * Two registers and a scalar: perform an operation between in do_2scalar()
2031 ((a->vd | a->vn | a->vm) & 0x10)) { in do_2scalar()
2036 /* Bad size (including size == 3, which is a different insn group) */ in do_2scalar()
2040 if (a->q && ((a->vd | a->vn) & 1)) { in do_2scalar()
2048 scalar = neon_get_scalar(a->size, a->vm); in do_2scalar()
2051 for (pass = 0; pass < (a->q ? 4 : 2); pass++) { in do_2scalar()
2052 read_neon_element32(tmp, a->vn, pass, MO_32); in do_2scalar()
2056 read_neon_element32(rd, a->vd, pass, MO_32); in do_2scalar()
2059 write_neon_element32(tmp, a->vd, pass, MO_32); in do_2scalar()
2064 static bool trans_VMUL_2sc(DisasContext *s, arg_2scalar *a) in trans_VMUL_2sc() argument
2073 return do_2scalar(s, a, opfn[a->size], NULL); in trans_VMUL_2sc()
2076 static bool trans_VMLA_2sc(DisasContext *s, arg_2scalar *a) in trans_VMLA_2sc() argument
2091 return do_2scalar(s, a, opfn[a->size], accfn[a->size]); in trans_VMLA_2sc()
2094 static bool trans_VMLS_2sc(DisasContext *s, arg_2scalar *a) in trans_VMLS_2sc() argument
2109 return do_2scalar(s, a, opfn[a->size], accfn[a->size]); in trans_VMLS_2sc()
2112 static bool do_2scalar_fp_vec(DisasContext *s, arg_2scalar *a, in do_2scalar_fp_vec() argument
2115 /* Two registers and a scalar, using gvec */ in do_2scalar_fp_vec()
2116 int vec_size = a->q ? 16 : 8; in do_2scalar_fp_vec()
2117 int rd_ofs = neon_full_reg_offset(a->vd); in do_2scalar_fp_vec()
2118 int rn_ofs = neon_full_reg_offset(a->vn); in do_2scalar_fp_vec()
2129 ((a->vd | a->vn | a->vm) & 0x10)) { in do_2scalar_fp_vec()
2134 /* Bad size (including size == 3, which is a different insn group) */ in do_2scalar_fp_vec()
2138 if (a->q && ((a->vd | a->vn) & 1)) { in do_2scalar_fp_vec()
2146 /* a->vm is M:Vm, which encodes both register and index */ in do_2scalar_fp_vec()
2147 idx = extract32(a->vm, a->size + 2, 2); in do_2scalar_fp_vec()
2148 a->vm = extract32(a->vm, 0, a->size + 2); in do_2scalar_fp_vec()
2149 rm_ofs = neon_full_reg_offset(a->vm); in do_2scalar_fp_vec()
2151 fpstatus = fpstatus_ptr(a->size == 1 ? FPST_STD_F16 : FPST_STD); in do_2scalar_fp_vec()
2158 static bool trans_##NAME##_F_2sc(DisasContext *s, arg_2scalar *a) \
2166 if (a->size == MO_16 && !dc_isar_feature(aa32_fp16_arith, s)) { \
2169 return do_2scalar_fp_vec(s, a, opfn[a->size]); \
2181 static bool trans_VQDMULH_2sc(DisasContext *s, arg_2scalar *a) in DO_VMUL_F_2sc()
2190 return do_2scalar(s, a, opfn[a->size], NULL); in DO_VMUL_F_2sc()
2193 static bool trans_VQRDMULH_2sc(DisasContext *s, arg_2scalar *a) in trans_VQRDMULH_2sc() argument
2202 return do_2scalar(s, a, opfn[a->size], NULL); in trans_VQRDMULH_2sc()
2205 static bool do_vqrdmlah_2sc(DisasContext *s, arg_2scalar *a, in do_vqrdmlah_2sc() argument
2210 * performs a kind of fused op-then-accumulate using a helper in do_vqrdmlah_2sc()
2226 ((a->vd | a->vn | a->vm) & 0x10)) { in do_vqrdmlah_2sc()
2231 /* Bad size (including size == 3, which is a different insn group) */ in do_vqrdmlah_2sc()
2235 if (a->q && ((a->vd | a->vn) & 1)) { in do_vqrdmlah_2sc()
2243 scalar = neon_get_scalar(a->size, a->vm); in do_vqrdmlah_2sc()
2247 for (pass = 0; pass < (a->q ? 4 : 2); pass++) { in do_vqrdmlah_2sc()
2248 read_neon_element32(rn, a->vn, pass, MO_32); in do_vqrdmlah_2sc()
2249 read_neon_element32(rd, a->vd, pass, MO_32); in do_vqrdmlah_2sc()
2251 write_neon_element32(rd, a->vd, pass, MO_32); in do_vqrdmlah_2sc()
2256 static bool trans_VQRDMLAH_2sc(DisasContext *s, arg_2scalar *a) in trans_VQRDMLAH_2sc() argument
2264 return do_vqrdmlah_2sc(s, a, opfn[a->size]); in trans_VQRDMLAH_2sc()
2267 static bool trans_VQRDMLSH_2sc(DisasContext *s, arg_2scalar *a) in trans_VQRDMLSH_2sc() argument
2275 return do_vqrdmlah_2sc(s, a, opfn[a->size]); in trans_VQRDMLSH_2sc()
2278 static bool do_2scalar_long(DisasContext *s, arg_2scalar *a, in do_2scalar_long() argument
2283 * Two registers and a scalar, long operations: perform an in do_2scalar_long()
2285 * a double-width result, and then possibly perform an accumulation in do_2scalar_long()
2297 ((a->vd | a->vn | a->vm) & 0x10)) { in do_2scalar_long()
2302 /* Bad size (including size == 3, which is a different insn group) */ in do_2scalar_long()
2306 if (a->vd & 1) { in do_2scalar_long()
2314 scalar = neon_get_scalar(a->size, a->vm); in do_2scalar_long()
2318 read_neon_element32(rn, a->vn, 0, MO_32); in do_2scalar_long()
2322 read_neon_element32(rn, a->vn, 1, MO_32); in do_2scalar_long()
2328 read_neon_element64(t64, a->vd, 0, MO_64); in do_2scalar_long()
2330 read_neon_element64(t64, a->vd, 1, MO_64); in do_2scalar_long()
2334 write_neon_element64(rn0_64, a->vd, 0, MO_64); in do_2scalar_long()
2335 write_neon_element64(rn1_64, a->vd, 1, MO_64); in do_2scalar_long()
2339 static bool trans_VMULL_S_2sc(DisasContext *s, arg_2scalar *a) in trans_VMULL_S_2sc() argument
2348 return do_2scalar_long(s, a, opfn[a->size], NULL); in trans_VMULL_S_2sc()
2351 static bool trans_VMULL_U_2sc(DisasContext *s, arg_2scalar *a) in trans_VMULL_U_2sc() argument
2360 return do_2scalar_long(s, a, opfn[a->size], NULL); in trans_VMULL_U_2sc()
2364 static bool trans_##INSN##_2sc(DisasContext *s, arg_2scalar *a) \
2378 return do_2scalar_long(s, a, opfn[a->size], accfn[a->size]); \
2386 static bool trans_VQDMULL_2sc(DisasContext *s, arg_2scalar *a) in DO_VMLAL_2SC()
2395 return do_2scalar_long(s, a, opfn[a->size], NULL); in DO_VMLAL_2SC()
2398 static bool trans_VQDMLAL_2sc(DisasContext *s, arg_2scalar *a) in trans_VQDMLAL_2sc() argument
2413 return do_2scalar_long(s, a, opfn[a->size], accfn[a->size]); in trans_VQDMLAL_2sc()
2416 static bool trans_VQDMLSL_2sc(DisasContext *s, arg_2scalar *a) in trans_VQDMLSL_2sc() argument
2431 return do_2scalar_long(s, a, opfn[a->size], accfn[a->size]); in trans_VQDMLSL_2sc()
2434 static bool trans_VEXT(DisasContext *s, arg_VEXT *a) in trans_VEXT() argument
2442 ((a->vd | a->vn | a->vm) & 0x10)) { in trans_VEXT()
2446 if ((a->vn | a->vm | a->vd) & a->q) { in trans_VEXT()
2450 if (a->imm > 7 && !a->q) { in trans_VEXT()
2458 if (!a->q) { in trans_VEXT()
2466 read_neon_element64(right, a->vn, 0, MO_64); in trans_VEXT()
2467 read_neon_element64(left, a->vm, 0, MO_64); in trans_VEXT()
2468 tcg_gen_extract2_i64(dest, right, left, a->imm * 8); in trans_VEXT()
2469 write_neon_element64(dest, a->vd, 0, MO_64); in trans_VEXT()
2480 if (a->imm < 8) { in trans_VEXT()
2481 read_neon_element64(right, a->vn, 0, MO_64); in trans_VEXT()
2482 read_neon_element64(middle, a->vn, 1, MO_64); in trans_VEXT()
2483 tcg_gen_extract2_i64(destright, right, middle, a->imm * 8); in trans_VEXT()
2484 read_neon_element64(left, a->vm, 0, MO_64); in trans_VEXT()
2485 tcg_gen_extract2_i64(destleft, middle, left, a->imm * 8); in trans_VEXT()
2487 read_neon_element64(right, a->vn, 1, MO_64); in trans_VEXT()
2488 read_neon_element64(middle, a->vm, 0, MO_64); in trans_VEXT()
2489 tcg_gen_extract2_i64(destright, right, middle, (a->imm - 8) * 8); in trans_VEXT()
2490 read_neon_element64(left, a->vm, 1, MO_64); in trans_VEXT()
2491 tcg_gen_extract2_i64(destleft, middle, left, (a->imm - 8) * 8); in trans_VEXT()
2494 write_neon_element64(destright, a->vd, 0, MO_64); in trans_VEXT()
2495 write_neon_element64(destleft, a->vd, 1, MO_64); in trans_VEXT()
2500 static bool trans_VTBL(DisasContext *s, arg_VTBL *a) in trans_VTBL() argument
2511 ((a->vd | a->vn | a->vm) & 0x10)) { in trans_VTBL()
2515 if ((a->vn + a->len + 1) > 32) { in trans_VTBL()
2527 desc = tcg_constant_i32((a->vn << 2) | a->len); in trans_VTBL()
2529 if (a->op) { in trans_VTBL()
2530 read_neon_element64(def, a->vd, 0, MO_64); in trans_VTBL()
2535 read_neon_element64(val, a->vm, 0, MO_64); in trans_VTBL()
2538 write_neon_element64(val, a->vd, 0, MO_64); in trans_VTBL()
2542 static bool trans_VDUP_scalar(DisasContext *s, arg_VDUP_scalar *a) in trans_VDUP_scalar() argument
2550 ((a->vd | a->vm) & 0x10)) { in trans_VDUP_scalar()
2554 if (a->vd & a->q) { in trans_VDUP_scalar()
2562 tcg_gen_gvec_dup_mem(a->size, neon_full_reg_offset(a->vd), in trans_VDUP_scalar()
2563 neon_element_offset(a->vm, a->index, a->size), in trans_VDUP_scalar()
2564 a->q ? 16 : 8, a->q ? 16 : 8); in trans_VDUP_scalar()
2568 static bool trans_VREV64(DisasContext *s, arg_VREV64 *a) in trans_VREV64() argument
2579 ((a->vd | a->vm) & 0x10)) { in trans_VREV64()
2583 if ((a->vd | a->vm) & a->q) { in trans_VREV64()
2587 if (a->size == 3) { in trans_VREV64()
2598 for (pass = 0; pass < (a->q ? 2 : 1); pass++) { in trans_VREV64()
2600 read_neon_element32(tmp[half], a->vm, pass * 2 + half, MO_32); in trans_VREV64()
2601 switch (a->size) { in trans_VREV64()
2614 write_neon_element32(tmp[1], a->vd, pass * 2, MO_32); in trans_VREV64()
2615 write_neon_element32(tmp[0], a->vd, pass * 2 + 1, MO_32); in trans_VREV64()
2620 static bool do_2misc_pairwise(DisasContext *s, arg_2misc *a, in do_2misc_pairwise() argument
2638 ((a->vd | a->vm) & 0x10)) { in do_2misc_pairwise()
2642 if ((a->vd | a->vm) & a->q) { in do_2misc_pairwise()
2654 for (pass = 0; pass < a->q + 1; pass++) { in do_2misc_pairwise()
2663 read_neon_element32(tmp, a->vm, pass * 2, MO_32); in do_2misc_pairwise()
2665 read_neon_element32(tmp, a->vm, pass * 2 + 1, MO_32); in do_2misc_pairwise()
2672 read_neon_element64(tmp64, a->vd, pass, MO_64); in do_2misc_pairwise()
2675 write_neon_element64(rd_64, a->vd, pass, MO_64); in do_2misc_pairwise()
2680 static bool trans_VPADDL_S(DisasContext *s, arg_2misc *a) in trans_VPADDL_S() argument
2695 return do_2misc_pairwise(s, a, widenfn[a->size], opfn[a->size], NULL); in trans_VPADDL_S()
2698 static bool trans_VPADDL_U(DisasContext *s, arg_2misc *a) in trans_VPADDL_U() argument
2713 return do_2misc_pairwise(s, a, widenfn[a->size], opfn[a->size], NULL); in trans_VPADDL_U()
2716 static bool trans_VPADAL_S(DisasContext *s, arg_2misc *a) in trans_VPADAL_S() argument
2737 return do_2misc_pairwise(s, a, widenfn[a->size], opfn[a->size], in trans_VPADAL_S()
2738 accfn[a->size]); in trans_VPADAL_S()
2741 static bool trans_VPADAL_U(DisasContext *s, arg_2misc *a) in trans_VPADAL_U() argument
2762 return do_2misc_pairwise(s, a, widenfn[a->size], opfn[a->size], in trans_VPADAL_U()
2763 accfn[a->size]); in trans_VPADAL_U()
2768 static bool do_zip_uzp(DisasContext *s, arg_2misc *a, in do_zip_uzp() argument
2779 ((a->vd | a->vm) & 0x10)) { in do_zip_uzp()
2783 if ((a->vd | a->vm) & a->q) { in do_zip_uzp()
2796 pd = vfp_reg_ptr(true, a->vd); in do_zip_uzp()
2797 pm = vfp_reg_ptr(true, a->vm); in do_zip_uzp()
2802 static bool trans_VUZP(DisasContext *s, arg_2misc *a) in trans_VUZP() argument
2817 return do_zip_uzp(s, a, fn[a->q][a->size]); in trans_VUZP()
2820 static bool trans_VZIP(DisasContext *s, arg_2misc *a) in trans_VZIP() argument
2835 return do_zip_uzp(s, a, fn[a->q][a->size]); in trans_VZIP()
2838 static bool do_vmovn(DisasContext *s, arg_2misc *a, in do_vmovn() argument
2849 ((a->vd | a->vm) & 0x10)) { in do_vmovn()
2853 if (a->vm & 1) { in do_vmovn()
2869 read_neon_element64(rm, a->vm, 0, MO_64); in do_vmovn()
2871 read_neon_element64(rm, a->vm, 1, MO_64); in do_vmovn()
2873 write_neon_element64(rd0, a->vd, 0, MO_32); in do_vmovn()
2874 write_neon_element64(rd1, a->vd, 1, MO_32); in do_vmovn()
2879 static bool trans_##INSN(DisasContext *s, arg_2misc *a) \
2887 return do_vmovn(s, a, narrowfn[a->size]); \
2895 static bool trans_VSHLL(DisasContext *s, arg_2misc *a) in DO_VMOVN()
2905 NeonGenWidenFn *widenfn = widenfns[a->size]; in DO_VMOVN()
2913 ((a->vd | a->vm) & 0x10)) { in DO_VMOVN()
2917 if (a->vd & 1) { in DO_VMOVN()
2933 read_neon_element32(rm0, a->vm, 0, MO_32); in DO_VMOVN()
2934 read_neon_element32(rm1, a->vm, 1, MO_32); in DO_VMOVN()
2937 tcg_gen_shli_i64(rd, rd, 8 << a->size); in DO_VMOVN()
2938 write_neon_element64(rd, a->vd, 0, MO_64); in DO_VMOVN()
2940 tcg_gen_shli_i64(rd, rd, 8 << a->size); in DO_VMOVN()
2941 write_neon_element64(rd, a->vd, 1, MO_64); in DO_VMOVN()
2945 static bool trans_VCVT_B16_F32(DisasContext *s, arg_2misc *a) in trans_VCVT_B16_F32() argument
2957 ((a->vd | a->vm) & 0x10)) { in trans_VCVT_B16_F32()
2961 if ((a->vm & 1) || (a->size != 1)) { in trans_VCVT_B16_F32()
2974 read_neon_element64(tmp, a->vm, 0, MO_64); in trans_VCVT_B16_F32()
2977 read_neon_element64(tmp, a->vm, 1, MO_64); in trans_VCVT_B16_F32()
2980 write_neon_element32(dst0, a->vd, 0, MO_32); in trans_VCVT_B16_F32()
2981 write_neon_element32(dst1, a->vd, 1, MO_32); in trans_VCVT_B16_F32()
2985 static bool trans_VCVT_F16_F32(DisasContext *s, arg_2misc *a) in trans_VCVT_F16_F32() argument
2997 ((a->vd | a->vm) & 0x10)) { in trans_VCVT_F16_F32()
3001 if ((a->vm & 1) || (a->size != 1)) { in trans_VCVT_F16_F32()
3012 read_neon_element32(tmp, a->vm, 0, MO_32); in trans_VCVT_F16_F32()
3015 read_neon_element32(tmp2, a->vm, 1, MO_32); in trans_VCVT_F16_F32()
3019 read_neon_element32(tmp, a->vm, 2, MO_32); in trans_VCVT_F16_F32()
3022 read_neon_element32(tmp3, a->vm, 3, MO_32); in trans_VCVT_F16_F32()
3023 write_neon_element32(tmp2, a->vd, 0, MO_32); in trans_VCVT_F16_F32()
3027 write_neon_element32(tmp3, a->vd, 1, MO_32); in trans_VCVT_F16_F32()
3031 static bool trans_VCVT_F32_F16(DisasContext *s, arg_2misc *a) in trans_VCVT_F32_F16() argument
3043 ((a->vd | a->vm) & 0x10)) { in trans_VCVT_F32_F16()
3047 if ((a->vd & 1) || (a->size != 1)) { in trans_VCVT_F32_F16()
3060 read_neon_element32(tmp, a->vm, 0, MO_32); in trans_VCVT_F32_F16()
3061 read_neon_element32(tmp2, a->vm, 1, MO_32); in trans_VCVT_F32_F16()
3064 write_neon_element32(tmp3, a->vd, 0, MO_32); in trans_VCVT_F32_F16()
3067 write_neon_element32(tmp, a->vd, 1, MO_32); in trans_VCVT_F32_F16()
3070 write_neon_element32(tmp3, a->vd, 2, MO_32); in trans_VCVT_F32_F16()
3073 write_neon_element32(tmp2, a->vd, 3, MO_32); in trans_VCVT_F32_F16()
3077 static bool do_2misc_vec(DisasContext *s, arg_2misc *a, GVecGen2Fn *fn) in do_2misc_vec() argument
3079 int vec_size = a->q ? 16 : 8; in do_2misc_vec()
3080 int rd_ofs = neon_full_reg_offset(a->vd); in do_2misc_vec()
3081 int rm_ofs = neon_full_reg_offset(a->vm); in do_2misc_vec()
3089 ((a->vd | a->vm) & 0x10)) { in do_2misc_vec()
3093 if (a->size == 3) { in do_2misc_vec()
3097 if ((a->vd | a->vm) & a->q) { in do_2misc_vec()
3105 fn(a->size, rd_ofs, rm_ofs, vec_size, vec_size); in do_2misc_vec()
3111 static bool trans_##INSN(DisasContext *s, arg_2misc *a) \
3113 return do_2misc_vec(s, a, FN); \
3124 static bool trans_VMVN(DisasContext *s, arg_2misc *a) in DO_2MISC_VEC()
3126 if (a->size != 0) { in DO_2MISC_VEC()
3129 return do_2misc_vec(s, a, tcg_gen_gvec_not); in DO_2MISC_VEC()
3158 static bool trans_##INSN(DisasContext *s, arg_2misc *a) \
3160 if (!dc_isar_feature(FEATURE, s) || a->size != SIZE) { \
3163 return do_2misc_vec(s, a, gen_##INSN); \
3174 static bool do_2misc(DisasContext *s, arg_2misc *a, NeonGenOneOpFn *fn) in do_2misc() argument
3179 /* Handle a 2-reg-misc operation by iterating 32 bits at a time */ in do_2misc()
3186 ((a->vd | a->vm) & 0x10)) { in do_2misc()
3194 if ((a->vd | a->vm) & a->q) { in do_2misc()
3203 for (pass = 0; pass < (a->q ? 4 : 2); pass++) { in do_2misc()
3204 read_neon_element32(tmp, a->vm, pass, MO_32); in do_2misc()
3206 write_neon_element32(tmp, a->vd, pass, MO_32); in do_2misc()
3211 static bool trans_VREV32(DisasContext *s, arg_2misc *a) in trans_VREV32() argument
3219 return do_2misc(s, a, fn[a->size]); in trans_VREV32()
3222 static bool trans_VREV16(DisasContext *s, arg_2misc *a) in trans_VREV16() argument
3224 if (a->size != 0) { in trans_VREV16()
3227 return do_2misc(s, a, gen_rev16); in trans_VREV16()
3230 static bool trans_VCLS(DisasContext *s, arg_2misc *a) in trans_VCLS() argument
3238 return do_2misc(s, a, fn[a->size]); in trans_VCLS()
3246 static bool trans_VCLZ(DisasContext *s, arg_2misc *a) in trans_VCLZ() argument
3254 return do_2misc(s, a, fn[a->size]); in trans_VCLZ()
3257 static bool trans_VCNT(DisasContext *s, arg_2misc *a) in trans_VCNT() argument
3259 if (a->size != 0) { in trans_VCNT()
3262 return do_2misc(s, a, gen_helper_neon_cnt_u8); in trans_VCNT()
3273 static bool trans_VABS_F(DisasContext *s, arg_2misc *a) in trans_VABS_F() argument
3275 if (a->size == MO_16) { in trans_VABS_F()
3279 } else if (a->size != MO_32) { in trans_VABS_F()
3282 return do_2misc_vec(s, a, gen_VABS_F); in trans_VABS_F()
3293 static bool trans_VNEG_F(DisasContext *s, arg_2misc *a) in trans_VNEG_F() argument
3295 if (a->size == MO_16) { in trans_VNEG_F()
3299 } else if (a->size != MO_32) { in trans_VNEG_F()
3302 return do_2misc_vec(s, a, gen_VNEG_F); in trans_VNEG_F()
3305 static bool trans_VRECPE(DisasContext *s, arg_2misc *a) in trans_VRECPE() argument
3307 if (a->size != 2) { in trans_VRECPE()
3310 return do_2misc(s, a, gen_helper_recpe_u32); in trans_VRECPE()
3313 static bool trans_VRSQRTE(DisasContext *s, arg_2misc *a) in trans_VRSQRTE() argument
3315 if (a->size != 2) { in trans_VRSQRTE()
3318 return do_2misc(s, a, gen_helper_rsqrte_u32); in trans_VRSQRTE()
3334 static bool trans_VQABS(DisasContext *s, arg_2misc *a) in WRAP_1OP_ENV_FN()
3342 return do_2misc(s, a, fn[a->size]); in WRAP_1OP_ENV_FN()
3345 static bool trans_VQNEG(DisasContext *s, arg_2misc *a) in trans_VQNEG() argument
3353 return do_2misc(s, a, fn[a->size]); in trans_VQNEG()
3369 static bool trans_##INSN(DisasContext *s, arg_2misc *a) \
3371 if (a->size == MO_16) { \
3375 } else if (a->size != MO_32) { \
3378 return do_2misc_vec(s, a, gen_##INSN); \
3395 static bool trans_VRINTX(DisasContext *s, arg_2misc *a) in DO_2MISC_FP_VEC()
3400 return trans_VRINTX_impl(s, a); in DO_2MISC_FP_VEC()
3419 static bool trans_##INSN(DisasContext *s, arg_2misc *a) \
3424 if (a->size == MO_16) { \
3428 } else if (a->size != MO_32) { \
3431 return do_2misc_vec(s, a, gen_##INSN); \
3449 static bool trans_VSWP(DisasContext *s, arg_2misc *a) in DO_VEC_RMODE()
3460 ((a->vd | a->vm) & 0x10)) { in DO_VEC_RMODE()
3464 if (a->size != 0) { in DO_VEC_RMODE()
3468 if ((a->vd | a->vm) & a->q) { in DO_VEC_RMODE()
3478 for (pass = 0; pass < (a->q ? 2 : 1); pass++) { in DO_VEC_RMODE()
3479 read_neon_element64(rm, a->vm, pass, MO_64); in DO_VEC_RMODE()
3480 read_neon_element64(rd, a->vd, pass, MO_64); in DO_VEC_RMODE()
3481 write_neon_element64(rm, a->vd, pass, MO_64); in DO_VEC_RMODE()
3482 write_neon_element64(rd, a->vm, pass, MO_64); in DO_VEC_RMODE()
3522 static bool trans_VTRN(DisasContext *s, arg_2misc *a) in trans_VTRN() argument
3533 ((a->vd | a->vm) & 0x10)) { in trans_VTRN()
3537 if ((a->vd | a->vm) & a->q) { in trans_VTRN()
3541 if (a->size == 3) { in trans_VTRN()
3551 if (a->size == MO_32) { in trans_VTRN()
3552 for (pass = 0; pass < (a->q ? 4 : 2); pass += 2) { in trans_VTRN()
3553 read_neon_element32(tmp, a->vm, pass, MO_32); in trans_VTRN()
3554 read_neon_element32(tmp2, a->vd, pass + 1, MO_32); in trans_VTRN()
3555 write_neon_element32(tmp2, a->vm, pass, MO_32); in trans_VTRN()
3556 write_neon_element32(tmp, a->vd, pass + 1, MO_32); in trans_VTRN()
3559 for (pass = 0; pass < (a->q ? 4 : 2); pass++) { in trans_VTRN()
3560 read_neon_element32(tmp, a->vm, pass, MO_32); in trans_VTRN()
3561 read_neon_element32(tmp2, a->vd, pass, MO_32); in trans_VTRN()
3562 if (a->size == MO_8) { in trans_VTRN()
3567 write_neon_element32(tmp2, a->vm, pass, MO_32); in trans_VTRN()
3568 write_neon_element32(tmp, a->vd, pass, MO_32); in trans_VTRN()
3574 static bool trans_VSMMLA(DisasContext *s, arg_VSMMLA *a) in trans_VSMMLA() argument
3579 return do_neon_ddda(s, 7, a->vd, a->vn, a->vm, 0, in trans_VSMMLA()
3583 static bool trans_VUMMLA(DisasContext *s, arg_VUMMLA *a) in trans_VUMMLA() argument
3588 return do_neon_ddda(s, 7, a->vd, a->vn, a->vm, 0, in trans_VUMMLA()
3592 static bool trans_VUSMMLA(DisasContext *s, arg_VUSMMLA *a) in trans_VUSMMLA() argument
3597 return do_neon_ddda(s, 7, a->vd, a->vn, a->vm, 0, in trans_VUSMMLA()
3601 static bool trans_VMMLA_b16(DisasContext *s, arg_VMMLA_b16 *a) in trans_VMMLA_b16() argument
3606 return do_neon_ddda_env(s, 7, a->vd, a->vn, a->vm, 0, in trans_VMMLA_b16()
3610 static bool trans_VFMA_b16(DisasContext *s, arg_VFMA_b16 *a) in trans_VFMA_b16() argument
3615 return do_neon_ddda_fpst(s, 7, a->vd, a->vn, a->vm, a->q, FPST_STD, in trans_VFMA_b16()
3619 static bool trans_VFMA_b16_scal(DisasContext *s, arg_VFMA_b16_scal *a) in trans_VFMA_b16_scal() argument
3624 return do_neon_ddda_fpst(s, 6, a->vd, a->vn, a->vm, in trans_VFMA_b16_scal()
3625 (a->index << 1) | a->q, FPST_STD, in trans_VFMA_b16_scal()