Lines Matching refs:write_vec_element

1130 static void write_vec_element(DisasContext *s, TCGv_i64 tcg_src, int destidx,  in write_vec_element()  function
1188 write_vec_element(s, tcg_tmp, destidx, element, mop & MO_SIZE); in do_vec_ld()
4871 write_vec_element(s, cpu_reg(s, a->rn), a->rd, idx, esz); in TRANS()
4890 write_vec_element(s, tmp, a->rd, didx, esz); in trans_INS_element()
5731 write_vec_element(s, tcg_op0, rd, elt, esz + 1); in do_3op_widening()
5948 write_vec_element(s, tcg_op0, a->rd, elt, esz + 1); in do_addsub_wide()
6002 write_vec_element(s, tcg_op0, a->rd, elt + top_half, esz); in TRANS()
6196 write_vec_element(s, t0, a->rd, 0, a->esz + 1); in do_scalar_muladd_widening_idx()
8941 write_vec_element(s, tcg_resl, rd, 0, MO_64); in disas_simd_ext()
8943 write_vec_element(s, tcg_resh, rd, 1, MO_64); in disas_simd_ext()
9064 write_vec_element(s, tcg_res[i], rd, i, MO_64); in disas_simd_zip_trn()
9610 write_vec_element(s, tcg_final, rd, 0, MO_64); in handle_vec_simd_sqshrn()
9612 write_vec_element(s, tcg_final, rd, 1, MO_64); in handle_vec_simd_sqshrn()
9673 write_vec_element(s, tcg_op, rd, pass, MO_64); in handle_simd_qshl()
9759 write_vec_element(s, tcg_double, rd, pass, MO_64); in handle_simd_intfp_conv()
9917 write_vec_element(s, tcg_op, rd, pass, MO_64); in handle_simd_shift_fpint_conv()
10187 write_vec_element(s, tcg_res, rd, pass, MO_64); in handle_2misc_fcmp_zero()
10295 write_vec_element(s, tcg_res, rd, pass, MO_64); in handle_2misc_reciprocal()
10757 write_vec_element(s, tcg_rd, rd, i, size + 1); in handle_vec_simd_wshli()
10806 write_vec_element(s, tcg_final, rd, 0, MO_64); in handle_vec_simd_shrn()
10808 write_vec_element(s, tcg_final, rd, 1, MO_64); in handle_vec_simd_shrn()
10912 write_vec_element(s, tcg_res[pass], rd, pass, MO_64); in handle_2misc_widening()
10973 write_vec_element(s, tcg_tmp, rd, i, grp_size); in handle_rev()
10998 write_vec_element(s, tcg_rd[i], rd, i, MO_64); in handle_rev()
11067 write_vec_element(s, tcg_res[pass], rd, pass, MO_64); in handle_2misc_pairwise()
11094 write_vec_element(s, tcg_res[pass], rd, pass, MO_64); in handle_shll()
11432 write_vec_element(s, tcg_res, rd, pass, MO_64); in disas_simd_two_reg_misc()