Lines Matching refs:opcode

5170     unsigned int sf, opcode, opcode2, rn, rd;  in disas_data_proc_1src()  local
5179 opcode = extract32(insn, 10, 6); in disas_data_proc_1src()
5186 switch (MAP(sf, opcode2, opcode)) { in disas_data_proc_1src()
5457 unsigned int sf, rm, opcode, rn, rd, setflag; in disas_data_proc_2src() local
5461 opcode = extract32(insn, 10, 6); in disas_data_proc_2src()
5465 if (setflag && opcode != 0) { in disas_data_proc_2src()
5470 switch (opcode) { in disas_data_proc_2src()
5547 int sz = extract32(opcode, 0, 2); in disas_data_proc_2src()
5548 bool crc32c = extract32(opcode, 2, 1); in disas_data_proc_2src()
5870 static void handle_fp_1src_half(DisasContext *s, int opcode, int rd, int rn) in handle_fp_1src_half() argument
5876 switch (opcode) { in handle_fp_1src_half()
5899 tcg_rmode = gen_set_rmode(opcode & 7, fpst); in handle_fp_1src_half()
5920 static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn) in handle_fp_1src_single() argument
5930 switch (opcode) { in handle_fp_1src_single()
5951 rmode = opcode & 7; in handle_fp_1src_single()
5992 static void handle_fp_1src_double(DisasContext *s, int opcode, int rd, int rn) in handle_fp_1src_double() argument
5999 switch (opcode) { in handle_fp_1src_double()
6008 switch (opcode) { in handle_fp_1src_double()
6023 rmode = opcode & 7; in handle_fp_1src_double()
6063 static void handle_fp_fcvt(DisasContext *s, int opcode, in handle_fp_fcvt() argument
6138 int opcode = extract32(insn, 15, 6); in disas_fp_1src() local
6146 switch (opcode) { in disas_fp_1src()
6150 int dtype = extract32(opcode, 0, 2); in disas_fp_1src()
6158 handle_fp_fcvt(s, opcode, rd, rn, dtype, type); in disas_fp_1src()
6176 handle_fp_1src_single(s, opcode, rd, rn); in disas_fp_1src()
6182 handle_fp_1src_double(s, opcode, rd, rn); in disas_fp_1src()
6192 handle_fp_1src_half(s, opcode, rd, rn); in disas_fp_1src()
6208 handle_fp_1src_single(s, opcode, rd, rn); in disas_fp_1src()
6223 static void handle_fp_2src_single(DisasContext *s, int opcode, in handle_fp_2src_single() argument
6236 switch (opcode) { in handle_fp_2src_single()
6271 static void handle_fp_2src_double(DisasContext *s, int opcode, in handle_fp_2src_double() argument
6284 switch (opcode) { in handle_fp_2src_double()
6319 static void handle_fp_2src_half(DisasContext *s, int opcode, in handle_fp_2src_half() argument
6332 switch (opcode) { in handle_fp_2src_half()
6381 int opcode = extract32(insn, 12, 4); in disas_fp_2src() local
6383 if (opcode > 8 || mos) { in disas_fp_2src()
6393 handle_fp_2src_single(s, opcode, rd, rn, rm); in disas_fp_2src()
6399 handle_fp_2src_double(s, opcode, rd, rn, rm); in disas_fp_2src()
6409 handle_fp_2src_half(s, opcode, rd, rn, rm); in disas_fp_2src()
6614 static void handle_fpfpcvt(DisasContext *s, int rd, int rn, int opcode, in handle_fpfpcvt() argument
6617 bool is_signed = !(opcode & 1); in handle_fpfpcvt()
6684 if (extract32(opcode, 2, 1)) { in handle_fpfpcvt()
6783 int opcode = extract32(insn, 16, 3); in disas_fp_fixed_conv() local
6809 switch ((rmode << 3) | opcode) { in disas_fp_fixed_conv()
6827 handle_fpfpcvt(s, rd, rn, opcode, itof, FPROUNDING_ZERO, scale, sf, type); in disas_fp_fixed_conv()
6915 int opcode = extract32(insn, 16, 3); in disas_fp_int_conv() local
6926 switch (opcode) { in disas_fp_int_conv()
6954 handle_fpfpcvt(s, rd, rn, opcode, itof, rmode, 64, sf, type); in disas_fp_int_conv()
6958 switch (sf << 7 | type << 5 | rmode << 3 | opcode) { in disas_fp_int_conv()
6976 itof = opcode & 1; in disas_fp_int_conv()
7188 int opcode = extract32(insn, 12, 2); in disas_simd_zip_trn() local
7197 if (opcode == 0 || (size == 3 && !is_q)) { in disas_simd_zip_trn()
7213 switch (opcode) { in disas_simd_zip_trn()
7342 int opcode = extract32(insn, 12, 5); in disas_simd_across_lanes() local
7352 switch (opcode) { in disas_simd_across_lanes()
7418 switch (opcode) { in disas_simd_across_lanes()
7449 int fpopcode = opcode | is_min << 4 | is_u << 5; in disas_simd_across_lanes()
7457 if (opcode == 0x03) { in disas_simd_across_lanes()
7835 int opcode = extract32(insn, 12, 5); in disas_simd_scalar_pairwise() local
7844 opcode |= (extract32(size, 1, 1) << 5); in disas_simd_scalar_pairwise()
7846 switch (opcode) { in disas_simd_scalar_pairwise()
7894 switch (opcode) { in disas_simd_scalar_pairwise()
7927 switch (opcode) { in disas_simd_scalar_pairwise()
7947 switch (opcode) { in disas_simd_scalar_pairwise()
8058 int opcode, int rn, int rd) in handle_scalar_simd_shri() argument
8079 switch (opcode) { in handle_scalar_simd_shri()
8122 int immh, int immb, int opcode, in handle_scalar_simd_shli() argument
8156 int immh, int immb, int opcode, in handle_vec_simd_sqshrn() argument
8164 bool round = extract32(opcode, 0, 1); in handle_vec_simd_sqshrn()
8443 int immh, int immb, int opcode, in handle_simd_shift_intfp_conv() argument
8595 int opcode = extract32(insn, 11, 5); in disas_simd_scalar_shift_imm() local
8605 switch (opcode) { in disas_simd_scalar_shift_imm()
8616 handle_scalar_simd_shri(s, is_u, immh, immb, opcode, rn, rd); in disas_simd_scalar_shift_imm()
8619 handle_scalar_simd_shli(s, is_u, immh, immb, opcode, rn, rd); in disas_simd_scalar_shift_imm()
8623 opcode, rn, rd); in disas_simd_scalar_shift_imm()
8632 immh, immb, opcode, rn, rd); in disas_simd_scalar_shift_imm()
8637 immh, immb, opcode, rn, rd); in disas_simd_scalar_shift_imm()
8668 int opcode = extract32(insn, 12, 4); in disas_simd_scalar_three_reg_diff() local
8678 switch (opcode) { in disas_simd_scalar_three_reg_diff()
8707 switch (opcode) { in disas_simd_scalar_three_reg_diff()
8731 switch (opcode) { in disas_simd_scalar_three_reg_diff()
8754 static void handle_3same_64(DisasContext *s, int opcode, bool u, in handle_3same_64() argument
8764 switch (opcode) { in handle_3same_64()
9022 int opcode = extract32(insn, 11, 5); in disas_simd_scalar_three_reg_same() local
9028 if (opcode >= 0x18) { in disas_simd_scalar_three_reg_same()
9030 int fpopcode = opcode | (extract32(size, 1, 1) << 5) | (u << 6); in disas_simd_scalar_three_reg_same()
9055 switch (opcode) { in disas_simd_scalar_three_reg_same()
9093 handle_3same_64(s, opcode, u, tcg_rd, tcg_rn, tcg_rm); in disas_simd_scalar_three_reg_same()
9109 switch (opcode) { in disas_simd_scalar_three_reg_same()
9184 int opcode = extract32(insn, 11, 3); in disas_simd_scalar_three_reg_same_fp16() local
9188 int fpopcode = opcode | (a << 3) | (u << 4); in disas_simd_scalar_three_reg_same_fp16()
9271 int opcode = extract32(insn, 11, 4); in disas_simd_scalar_three_reg_same_extra() local
9279 switch (u * 16 + opcode) { in disas_simd_scalar_three_reg_same_extra()
9314 switch (opcode) { in disas_simd_scalar_three_reg_same_extra()
9338 static void handle_2misc_64(DisasContext *s, int opcode, bool u, in handle_2misc_64() argument
9350 switch (opcode) { in handle_2misc_64()
9437 static void handle_2misc_fcmp_zero(DisasContext *s, int opcode, in handle_2misc_fcmp_zero() argument
9458 switch (opcode) { in handle_2misc_fcmp_zero()
9498 switch (opcode) { in handle_2misc_fcmp_zero()
9518 switch (opcode) { in handle_2misc_fcmp_zero()
9566 static void handle_2misc_reciprocal(DisasContext *s, int opcode, in handle_2misc_reciprocal() argument
9580 switch (opcode) { in handle_2misc_reciprocal()
9610 switch (opcode) { in handle_2misc_reciprocal()
9640 int opcode, bool u, bool is_q, in handle_2misc_narrow() argument
9667 switch (opcode) { in handle_2misc_narrow()
9838 int opcode = extract32(insn, 12, 5); in disas_simd_scalar_two_reg_misc() local
9846 switch (opcode) { in disas_simd_scalar_two_reg_misc()
9883 handle_2misc_narrow(s, true, opcode, u, false, size, rn, rd); in disas_simd_scalar_two_reg_misc()
9891 opcode |= (extract32(size, 1, 1) << 5) | (u << 6); in disas_simd_scalar_two_reg_misc()
9893 switch (opcode) { in disas_simd_scalar_two_reg_misc()
9899 handle_2misc_fcmp_zero(s, opcode, true, u, true, size, rn, rd); in disas_simd_scalar_two_reg_misc()
9904 bool is_signed = (opcode == 0x1d); in disas_simd_scalar_two_reg_misc()
9917 handle_2misc_reciprocal(s, opcode, true, u, true, size, rn, rd); in disas_simd_scalar_two_reg_misc()
9928 rmode = extract32(opcode, 5, 1) | (extract32(opcode, 0, 1) << 1); in disas_simd_scalar_two_reg_misc()
9944 handle_2misc_narrow(s, true, opcode, u, false, size - 1, rn, rd); in disas_simd_scalar_two_reg_misc()
9972 handle_2misc_64(s, opcode, u, tcg_rd, tcg_rn, tcg_rmode, tcg_fpstatus); in disas_simd_scalar_two_reg_misc()
9980 switch (opcode) { in disas_simd_scalar_two_reg_misc()
10023 int immh, int immb, int opcode, int rn, int rd) in handle_vec_simd_shri() argument
10040 switch (opcode) { in handle_vec_simd_shri()
10084 int immh, int immb, int opcode, int rn, int rd) in handle_vec_simd_shli() argument
10111 int immh, int immb, int opcode, int rn, int rd) in handle_vec_simd_wshli() argument
10148 int immh, int immb, int opcode, int rn, int rd) in handle_vec_simd_shrn() argument
10156 bool round = extract32(opcode, 0, 1); in handle_vec_simd_shrn()
10209 int opcode = extract32(insn, 11, 5); in disas_simd_shift_imm() local
10218 switch (opcode) { in disas_simd_shift_imm()
10229 handle_vec_simd_shri(s, is_q, is_u, immh, immb, opcode, rn, rd); in disas_simd_shift_imm()
10232 handle_vec_simd_shli(s, is_q, is_u, immh, immb, opcode, rn, rd); in disas_simd_shift_imm()
10238 opcode, rn, rd); in disas_simd_shift_imm()
10240 handle_vec_simd_shrn(s, is_q, immh, immb, opcode, rn, rd); in disas_simd_shift_imm()
10246 opcode, rn, rd); in disas_simd_shift_imm()
10249 handle_vec_simd_wshli(s, is_q, is_u, immh, immb, opcode, rn, rd); in disas_simd_shift_imm()
10253 opcode, rn, rd); in disas_simd_shift_imm()
10293 int opcode, int rd, int rn, int rm) in handle_3rd_widening() argument
10305 switch (opcode) { in handle_3rd_widening()
10346 switch (opcode) { in handle_3rd_widening()
10382 if (opcode == 9 || opcode == 11) { in handle_3rd_widening()
10412 switch (opcode) { in handle_3rd_widening()
10425 gen_neon_addl(size, (opcode == 2), tcg_passres, in handle_3rd_widening()
10475 if (opcode == 9 || opcode == 11) { in handle_3rd_widening()
10496 int opcode, int rd, int rn, int rm) in handle_3rd_wide() argument
10517 gen_neon_addl(size, (opcode == 3), in handle_3rd_wide()
10533 int opcode, int rd, int rn, int rm) in handle_3rd_narrowing() argument
10555 gen_neon_addl(size, (opcode == 6), tcg_wideres, tcg_op1, tcg_op2); in handle_3rd_narrowing()
10588 int opcode = extract32(insn, 12, 4); in disas_simd_three_reg_diff() local
10593 switch (opcode) { in disas_simd_three_reg_diff()
10604 handle_3rd_wide(s, is_q, is_u, size, opcode, rd, rn, rm); in disas_simd_three_reg_diff()
10616 handle_3rd_narrowing(s, is_q, is_u, size, opcode, rd, rn, rm); in disas_simd_three_reg_diff()
10675 handle_3rd_widening(s, is_q, is_u, size, opcode, rd, rn, rm); in disas_simd_three_reg_diff()
10735 static void handle_simd_3same_pair(DisasContext *s, int is_q, int u, int opcode, in handle_simd_3same_pair() argument
10742 if (opcode >= 0x58) { in handle_simd_3same_pair()
10767 switch (opcode) { in handle_simd_3same_pair()
10809 switch (opcode) { in handle_simd_3same_pair()
10968 int opcode = extract32(insn, 11, 5); in disas_simd_3same_int() local
10975 switch (opcode) { in disas_simd_3same_int()
11013 switch (opcode) { in disas_simd_3same_int()
11124 handle_3same_64(s, opcode, u, tcg_res, tcg_op1, tcg_op2); in disas_simd_3same_int()
11139 switch (opcode) { in disas_simd_3same_int()
11224 int opcode = extract32(insn, 11, 5); in disas_simd_three_reg_same() local
11226 switch (opcode) { in disas_simd_three_reg_same()
11241 if (opcode == 0x17) { in disas_simd_three_reg_same()
11252 handle_simd_3same_pair(s, is_q, u, opcode, size, rn, rm, rd); in disas_simd_three_reg_same()
11279 int opcode = extract32(insn, 11, 3); in disas_simd_three_reg_same_fp16() local
11290 int fpopcode = opcode | (a << 3) | (u << 4); in disas_simd_three_reg_same_fp16()
11477 int opcode = extract32(insn, 11, 4); in disas_simd_three_reg_same_extra() local
11485 switch (u * 16 + opcode) { in disas_simd_three_reg_same_extra()
11562 switch (opcode) { in disas_simd_three_reg_same_extra()
11593 rot = extract32(opcode, 0, 2); in disas_simd_three_reg_same_extra()
11614 rot = extract32(opcode, 1, 1); in disas_simd_three_reg_same_extra()
11655 static void handle_2misc_widening(DisasContext *s, int opcode, bool is_q, in handle_2misc_widening() argument
11699 static void handle_rev(DisasContext *s, int opcode, bool u, in handle_rev() argument
11702 int op = (opcode << 1) | u; in handle_rev()
11769 static void handle_2misc_pairwise(DisasContext *s, int opcode, bool u, in handle_2misc_pairwise() argument
11777 bool accum = (opcode == 0x6); in handle_2misc_pairwise()
11872 int opcode = extract32(insn, 12, 5); in disas_simd_two_reg_misc() local
11882 switch (opcode) { in disas_simd_two_reg_misc()
11885 handle_rev(s, opcode, u, is_q, size, rn, rd); in disas_simd_two_reg_misc()
11910 handle_2misc_narrow(s, false, opcode, u, is_q, size, rn, rd); in disas_simd_two_reg_misc()
11927 handle_2misc_pairwise(s, opcode, u, is_q, size, rn, rd); in disas_simd_two_reg_misc()
11976 opcode |= (extract32(size, 1, 1) << 5) | (u << 6); in disas_simd_two_reg_misc()
11978 switch (opcode) { in disas_simd_two_reg_misc()
11989 bool is_signed = (opcode == 0x1d) ? true : false; in disas_simd_two_reg_misc()
12010 handle_2misc_fcmp_zero(s, opcode, false, u, is_q, size, rn, rd); in disas_simd_two_reg_misc()
12027 rmode = extract32(opcode, 5, 1) | (extract32(opcode, 0, 1) << 1); in disas_simd_two_reg_misc()
12057 handle_2misc_reciprocal(s, opcode, false, u, is_q, size, rn, rd); in disas_simd_two_reg_misc()
12072 handle_2misc_narrow(s, false, opcode, 0, is_q, size - 1, rn, rd); in disas_simd_two_reg_misc()
12082 handle_2misc_narrow(s, false, opcode, 0, is_q, size - 1, rn, rd); in disas_simd_two_reg_misc()
12088 handle_2misc_widening(s, opcode, is_q, size, rn, rd); in disas_simd_two_reg_misc()
12094 rmode = extract32(opcode, 5, 1) | (extract32(opcode, 0, 1) << 1); in disas_simd_two_reg_misc()
12156 switch (opcode) { in disas_simd_two_reg_misc()
12203 handle_2misc_64(s, opcode, u, tcg_res, tcg_op, in disas_simd_two_reg_misc()
12219 switch (opcode) { in disas_simd_two_reg_misc()
12286 switch (opcode) { in disas_simd_two_reg_misc()
12354 int fpop, opcode, a, u; in disas_simd_two_reg_misc_fp16() local
12379 opcode = extract32(insn, 12, 5); in disas_simd_two_reg_misc_fp16()
12380 fpop = deposit32(opcode, 5, 1, a); in disas_simd_two_reg_misc_fp16()
12634 int opcode = extract32(insn, 12, 4); in disas_simd_indexed() local
12644 switch (16 * u + opcode) { in disas_simd_indexed()
12830 switch (16 * u + opcode) { in disas_simd_indexed()
12880 int is_s = extract32(opcode, 2, 1); in disas_simd_indexed()
12956 switch (16 * u + opcode) { in disas_simd_indexed()
13009 switch (16 * u + opcode) { in disas_simd_indexed()
13019 bool is_sub = opcode == 0x4; in disas_simd_indexed()
13026 if (opcode == 0x8) { in disas_simd_indexed()
13040 if (opcode == 0x5) { in disas_simd_indexed()
13054 if (opcode == 0x5) { in disas_simd_indexed()
13158 bool satop = extract32(opcode, 0, 1); in disas_simd_indexed()
13185 if (opcode == 0xa || opcode == 0xb) { in disas_simd_indexed()
13200 if (opcode == 0xa || opcode == 0xb) { in disas_simd_indexed()
13207 switch (opcode) { in disas_simd_indexed()
13255 if (opcode == 0xa || opcode == 0xb) { in disas_simd_indexed()
13272 if (opcode == 0xa || opcode == 0xb) { in disas_simd_indexed()
13279 switch (opcode) { in disas_simd_indexed()
13325 int opcode = extract32(insn, 12, 5); in disas_crypto_aes() local
13336 switch (opcode) { in disas_crypto_aes()
13373 int opcode = extract32(insn, 12, 3); in disas_crypto_three_reg_sha() local
13385 switch (opcode) { in disas_crypto_three_reg_sha()
13439 int opcode = extract32(insn, 12, 5); in disas_crypto_two_reg_sha() local
13450 switch (opcode) { in disas_crypto_two_reg_sha()
13513 int opcode = extract32(insn, 10, 2); in disas_crypto_three_reg_sha512() local
13523 switch (opcode) { in disas_crypto_three_reg_sha512()
13544 switch (opcode) { in disas_crypto_three_reg_sha512()
13587 int opcode = extract32(insn, 10, 2); in disas_crypto_two_reg_sha512() local
13592 switch (opcode) { in disas_crypto_two_reg_sha512()
13613 switch (opcode) { in disas_crypto_two_reg_sha512()
13753 int opcode = extract32(insn, 10, 2); in disas_crypto_three_reg_imm2() local
13768 gen_gvec_op3_ool(s, true, rd, rn, rm, imm2, fns[opcode]); in disas_crypto_three_reg_imm2()