445     gen_helper_rebuild_hflags_a64(tcg_env, tcg_constant_i32(s->current_el));  in gen_rebuild_hflags()
1685     if (s->current_el == 0) {  in trans_ERET()
1694                    offsetof(CPUARMState, elr_el[s->current_el]));  in trans_ERET()
1711     if (s->current_el == 0) {  in trans_ERETA()
1721                    offsetof(CPUARMState, elr_el[s->current_el]));  in trans_ERETA()
1866         if (s->current_el <= 1 && arm_dc_feature(s, ARM_FEATURE_EL2)) {  in trans_ESB()
2054     if (!dc_isar_feature(aa64_uao, s) || s->current_el == 0) {  in trans_MSR_i_UAO()
2069     if (!dc_isar_feature(aa64_pan, s) || s->current_el == 0) {  in trans_MSR_i_PAN()
2084     if (s->current_el == 0) {  in trans_MSR_i_SPSEL()
2161     if (!dc_isar_feature(aa64_nmi, s) || s->current_el == 0) {  in trans_MSR_i_ALLINT()
2167     } else if (s->current_el > 1) {  in trans_MSR_i_ALLINT()
2287         switch (s->current_el) {  in handle_sys()
2326     if (!cp_access_ok(s->current_el, ri, isread)) {  in handle_sys()
2411         assert(cp_access_ok(s->current_el, ri, isread));  in handle_sys()
2476         int el = s->nv ? 2 : s->current_el;  in handle_sys()
2615     int target_el = s->current_el == 3 ? 3 : 2;  in trans_HVC()
2617     if (s->current_el == 0) {  in trans_HVC()
2635     if (s->current_el == 0) {  in trans_SMC()
2662     if (semihosting_enabled(s->current_el == 0) && a->imm == 0xf000) {  in trans_HLT()
3989     if (s->current_el == 0) {  in trans_STZGM()
4021     if (s->current_el == 0) {  in trans_STGM()
4053     if (s->current_el == 0) {  in trans_LDGM()
11694     dc->current_el = arm_mmu_idx_to_el(dc->mmu_idx);  in aarch64_tr_init_disas_context()
11696     dc->user = (dc->current_el == 0);  in aarch64_tr_init_disas_context()