Lines Matching full:secure
62 uint32_t arm_v7m_mrs_control(CPUARMState *env, uint32_t secure) in arm_v7m_mrs_control() argument
64 uint32_t value = env->v7m.control[secure]; in arm_v7m_mrs_control()
66 if (!secure) { in arm_v7m_mrs_control()
221 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_write() local
247 env->v7m.cfsr[secure] |= R_V7M_CFSR_MLSPERR_MASK; in v7m_stack_write()
251 env->v7m.cfsr[secure] |= R_V7M_CFSR_MSTKERR_MASK; in v7m_stack_write()
254 exc_secure = secure; in v7m_stack_write()
309 bool secure = mmu_idx & ARM_MMU_IDX_M_S; in v7m_stack_read() local
326 env->v7m.cfsr[secure] |= R_V7M_CFSR_MUNSTKERR_MASK; in v7m_stack_read()
328 exc_secure = secure; in v7m_stack_read()
475 if (secstate == env->v7m.secure) { in write_v7m_control_spsel_for_secstate()
493 write_v7m_control_spsel_for_secstate(env, new_spsel, env->v7m.secure); in write_v7m_control_spsel()
521 if (env->v7m.secure == new_secstate) { in switch_v7m_security_state()
526 * All the banked state is accessed by looking at env->v7m.secure in switch_v7m_security_state()
540 env->v7m.secure = new_secstate; in switch_v7m_security_state()
582 /* translate.c should have made BXNS UNDEF unless we're secure */ in HELPER()
583 assert(env->v7m.secure); in HELPER()
606 /* translate.c will have made BLXNS UNDEF unless we're secure */ in HELPER()
607 assert(env->v7m.secure); in HELPER()
611 * Target is Secure, so this is just a normal BLX, in HELPER()
620 /* Target is non-secure: first push a stack frame */ in HELPER()
643 * Write a dummy value to IPSR, to avoid leaking the current secure in HELPER()
644 * exception number to non-secure code. This is guaranteed not in HELPER()
670 exc, targets_secure ? "secure" : "non-secure", addr); in arm_v7m_load_vector()
682 attrs.secure = targets_secure; in arm_v7m_load_vector()
691 attrs.secure = false; in arm_v7m_load_vector()
695 * to HardFault is SecureFault, which always targets Secure. in arm_v7m_load_vector()
724 * The HardFault is Secure if BFHFNMINS is 0 (meaning that all HFs are in arm_v7m_load_vector()
725 * secure); otherwise it targets the same security state as the in arm_v7m_load_vector()
804 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_STKOF_MASK; in v7m_push_callee_stack()
806 env->v7m.secure); in v7m_push_callee_stack()
849 targets_secure ? "secure" : "nonsecure", exc); in v7m_exception_taken()
864 * exception frame) is Secure. This means it may either already in v7m_exception_taken()
870 * We took an exception from Secure to NonSecure in v7m_exception_taken()
872 * and are now tailchaining to a Secure exception. in v7m_exception_taken()
873 * Clear DCRS so eventual return from this Secure in v7m_exception_taken()
880 * We're going to a non-secure exception; push the in v7m_exception_taken()
903 * Clear registers if necessary to prevent non-secure exception in v7m_exception_taken()
904 * code being able to see register values from secure code. in v7m_exception_taken()
916 * Secure (in which case these regs were saved in in v7m_exception_taken()
922 * state was Secure (EXCRET.S == 1) and exception in v7m_exception_taken()
923 * targets Non-secure state in v7m_exception_taken()
987 bool is_secure = env->v7m.secure; in v7m_update_fpccr()
993 * update the NS banked version of a bit even if we are secure. in v7m_update_fpccr()
1053 assert(env->v7m.secure); in HELPER()
1127 assert(env->v7m.secure); in HELPER()
1193 (env->v7m.secure || nsacr_cp10)) { in v7m_push_stack()
1194 if (env->v7m.secure && in v7m_push_stack()
1206 (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKALIGN_MASK)) { in v7m_push_stack()
1212 if (env->v7m.secure && in v7m_push_stack()
1231 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_STKOF_MASK; in v7m_push_stack()
1233 env->v7m.secure); in v7m_push_stack()
1278 } else if (!env->v7m.secure && !nsacr_cp10) { in v7m_push_stack()
1280 "...Secure UsageFault with CFSR.NOCP because " in v7m_push_stack()
1288 bool cpacr_pass = v7m_cpacr_pass(env, env->v7m.secure, in v7m_push_stack()
1301 env->v7m.secure); in v7m_push_stack()
1302 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_NOCP_MASK; in v7m_push_stack()
1375 * security extensions the magic secure-function-return has to in do_v7m_exception_exit()
1425 if (!env->v7m.secure && in do_v7m_exception_exit()
1505 !(env->v7m.ccr[env->v7m.secure] & in do_v7m_exception_exit()
1588 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVPC_MASK; in do_v7m_exception_exit()
1589 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); in do_v7m_exception_exit()
1730 env->v7m.secure); in do_v7m_exception_exit()
1731 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVPC_MASK; in do_v7m_exception_exit()
1748 "Secure LSPACT set but exception return is " in do_v7m_exception_exit()
1749 "not to secure state\n"); in do_v7m_exception_exit()
1784 "...taking Secure UsageFault on existing " in do_v7m_exception_exit()
1867 if (env->v7m.secure) { in do_v7m_exception_exit()
1883 * we know we're v7M so this is never a Secure UsageFault. in do_v7m_exception_exit()
1889 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVPC_MASK; in do_v7m_exception_exit()
1920 qemu_log_mask(CPU_LOG_INT, "...really v7M secure function return\n"); in do_v7m_function_return()
1929 /* Pull the return address and IPSR from the Secure stack */ in do_v7m_function_return()
1938 * do them as secure, so work out what MMU index that is. in do_v7m_function_return()
1950 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVPC_MASK; in do_v7m_function_return()
1952 env->v7m.secure); in do_v7m_function_return()
1978 static bool v7m_read_half_insn(ARMCPU *cpu, ARMMMUIdx mmu_idx, bool secure, in v7m_read_half_insn() argument
1990 * and then we do the load as a secure load (ie using the security in v7m_read_half_insn()
2000 v8m_security_lookup(env, addr, MMU_INST_FETCH, mmu_idx, secure, &sattrs); in v7m_read_half_insn()
2014 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_IACCVIOL_MASK; in v7m_read_half_insn()
2015 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_MEM, env->v7m.secure); in v7m_read_half_insn()
2086 * Check whether this attempt to execute code in a Secure & NS-Callable in v7m_handle_execute_nsc()
2099 assert(!env->v7m.secure); in v7m_handle_execute_nsc()
2102 /* We want to do the MPU lookup as secure; work out what mmu_idx that is */ in v7m_handle_execute_nsc()
2198 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); in arm_v7m_cpu_do_interrupt()
2199 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_UNDEFINSTR_MASK; in arm_v7m_cpu_do_interrupt()
2213 target_secstate = env->v7m.secure; in arm_v7m_cpu_do_interrupt()
2220 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); in arm_v7m_cpu_do_interrupt()
2221 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVSTATE_MASK; in arm_v7m_cpu_do_interrupt()
2224 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); in arm_v7m_cpu_do_interrupt()
2225 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_STKOF_MASK; in arm_v7m_cpu_do_interrupt()
2233 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); in arm_v7m_cpu_do_interrupt()
2234 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_UNALIGNED_MASK; in arm_v7m_cpu_do_interrupt()
2237 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); in arm_v7m_cpu_do_interrupt()
2238 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_DIVBYZERO_MASK; in arm_v7m_cpu_do_interrupt()
2242 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC, env->v7m.secure); in arm_v7m_cpu_do_interrupt()
2261 * which is marked as Secure & Non-Secure Callable and the CPU in arm_v7m_cpu_do_interrupt()
2262 * is in the Non-Secure state. The only instruction which can in arm_v7m_cpu_do_interrupt()
2279 if (env->v7m.secure) { in arm_v7m_cpu_do_interrupt()
2318 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_UNALIGNED_MASK; in arm_v7m_cpu_do_interrupt()
2320 env->v7m.secure); in arm_v7m_cpu_do_interrupt()
2329 env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_IACCVIOL_MASK; in arm_v7m_cpu_do_interrupt()
2333 env->v7m.cfsr[env->v7m.secure] |= in arm_v7m_cpu_do_interrupt()
2335 env->v7m.mmfar[env->v7m.secure] = env->exception.vaddress; in arm_v7m_cpu_do_interrupt()
2338 env->v7m.mmfar[env->v7m.secure]); in arm_v7m_cpu_do_interrupt()
2342 env->v7m.secure); in arm_v7m_cpu_do_interrupt()
2390 * The S bit indicates whether we should return to Secure in arm_v7m_cpu_do_interrupt()
2393 * to Secure or NonSecure (ie our target state). We set it in arm_v7m_cpu_do_interrupt()
2401 if (env->v7m.secure) { in arm_v7m_cpu_do_interrupt()
2433 return arm_v7m_mrs_control(env, env->v7m.secure); in HELPER()
2436 * We have to handle this here because unprivileged Secure code in HELPER()
2439 if (!env->v7m.secure) { in HELPER()
2453 if (!env->v7m.secure) { in HELPER()
2458 if (!env->v7m.secure) { in HELPER()
2463 if (!env->v7m.secure) { in HELPER()
2468 if (!env->v7m.secure) { in HELPER()
2473 if (!env->v7m.secure) { in HELPER()
2481 if (!env->v7m.secure) { in HELPER()
2489 if (!env->v7m.secure) { in HELPER()
2496 * This gives the non-secure SP selected based on whether we're in HELPER()
2501 if (!env->v7m.secure) { in HELPER()
2524 return env->v7m.msplim[env->v7m.secure]; in HELPER()
2529 return env->v7m.psplim[env->v7m.secure]; in HELPER()
2531 return env->v7m.primask[env->v7m.secure]; in HELPER()
2537 return env->v7m.basepri[env->v7m.secure]; in HELPER()
2542 return env->v7m.faultmask[env->v7m.secure]; in HELPER()
2576 if (!env->v7m.secure) { in HELPER()
2582 if (!env->v7m.secure) { in HELPER()
2588 if (!env->v7m.secure) { in HELPER()
2594 if (!env->v7m.secure) { in HELPER()
2600 if (!env->v7m.secure) { in HELPER()
2609 if (!env->v7m.secure) { in HELPER()
2618 if (!env->v7m.secure) { in HELPER()
2624 if (!env->v7m.secure) { in HELPER()
2647 * This gives the non-secure SP selected based on whether we're in HELPER()
2654 if (!env->v7m.secure) { in HELPER()
2700 env->v7m.msplim[env->v7m.secure] = val & ~7; in HELPER()
2706 env->v7m.psplim[env->v7m.secure] = val & ~7; in HELPER()
2709 env->v7m.primask[env->v7m.secure] = val & 1; in HELPER()
2715 env->v7m.basepri[env->v7m.secure] = val & 0xff; in HELPER()
2722 if (val != 0 && (val < env->v7m.basepri[env->v7m.secure] in HELPER()
2723 || env->v7m.basepri[env->v7m.secure] == 0)) { in HELPER()
2724 env->v7m.basepri[env->v7m.secure] = val; in HELPER()
2731 env->v7m.faultmask[env->v7m.secure] = val & 1; in HELPER()
2749 env->v7m.control[env->v7m.secure] &= ~R_V7M_CONTROL_NPRIV_MASK; in HELPER()
2750 env->v7m.control[env->v7m.secure] |= val & R_V7M_CONTROL_NPRIV_MASK; in HELPER()
2758 if (env->v7m.secure) { in HELPER()
2763 (env->v7m.secure || !arm_feature(env, ARM_FEATURE_M_SECURITY) || in HELPER()
2789 bool targetsec = env->v7m.secure; in HELPER()
2841 if (env->v7m.secure) { in HELPER()
2869 uint32_t *arm_v7m_get_sp_ptr(CPUARMState *env, bool secure, bool threadmode, in arm_v7m_get_sp_ptr() argument
2890 if (secure == env->v7m.secure) { in arm_v7m_get_sp_ptr()