323     int el = arm_current_el(env);  in access_tpm()  local
326     if (el < 2 && (mdcr_el2 & MDCR_TPM)) {  in access_tpm()
329     if (el < 3 && (env->cp15.mdcr_el3 & MDCR_TPM)) {  in access_tpm()
1095     int el = arm_current_el(env);  in pmreg_access()  local
1098     if (el == 0 && !(env->cp15.c9_pmuserenr & 1)) {  in pmreg_access()
1101     if (el < 2 && (mdcr_el2 & MDCR_TPM)) {  in pmreg_access()
1104     if (el < 3 && (env->cp15.mdcr_el3 & MDCR_TPM)) {  in pmreg_access()
1189     int el = arm_current_el(env);  in pmu_counter_enabled()  local
1214     if (el == 2 && (counter < hpmn || counter == 31)) {  in pmu_counter_enabled()
1232             if (el == 2) {  in pmu_counter_enabled()
1252     if (el == 0) {  in pmu_counter_enabled()
1254     } else if (el == 1) {  in pmu_counter_enabled()
1256     } else if (el == 2) {  in pmu_counter_enabled()
2493     int el = arm_current_el(env);  in gt_cntfrq_access()  local
2497     switch (el) {  in gt_cntfrq_access()
2521     if (!isread && el < arm_highest_el(env)) {  in gt_cntfrq_access()
3770     int el = arm_current_el(env);  in ats_write()  local
3776         switch (el) {  in ats_write()
3794         switch (el) {  in ats_write()
6177 bool el_is_in_host(CPUARMState *env, int el)  in el_is_in_host()  argument
6185     if (el & 1) {  in el_is_in_host()
6193     mask = el ? HCR_E2H : HCR_E2H | HCR_TGE;  in el_is_in_host()
7030     int el = arm_current_el(env);  in access_terr()  local
7032     if (el < 2 && (arm_hcr_el2_eff(env) & HCR_TERR)) {  in access_terr()
7035     if (el < 3 && (env->cp15.scr_el3 & SCR_TERR)) {  in access_terr()
7043     int el = arm_current_el(env);  in disr_read()  local
7045     if (el < 2 && (arm_hcr_el2_eff(env) & HCR_AMO)) {  in disr_read()
7048     if (el < 3 && (env->cp15.scr_el3 & SCR_EA)) {  in disr_read()
7056     int el = arm_current_el(env);  in disr_write()  local
7058     if (el < 2 && (arm_hcr_el2_eff(env) & HCR_AMO)) {  in disr_write()
7062     if (el < 3 && (env->cp15.scr_el3 & SCR_EA)) {  in disr_write()
7121 int sve_exception_el(CPUARMState *env, int el)  in sve_exception_el()  argument
7124     if (el <= 1 && !el_is_in_host(env, el)) {  in sve_exception_el()
7127             if (el != 0) {  in sve_exception_el()
7137     if (el <= 2 && arm_is_el2_enabled(env)) {  in sve_exception_el()
7142                 if (el != 0 || !(env->cp15.hcr_el2 & HCR_TGE)) {  in sve_exception_el()
7170 int sme_exception_el(CPUARMState *env, int el)  in sme_exception_el()  argument
7173     if (el <= 1 && !el_is_in_host(env, el)) {  in sme_exception_el()
7176             if (el != 0) {  in sme_exception_el()
7186     if (el <= 2 && arm_is_el2_enabled(env)) {  in sme_exception_el()
7191                 if (el != 0 || !(env->cp15.hcr_el2 & HCR_TGE)) {  in sme_exception_el()
7218 uint32_t sve_vqm1_for_el_sm(CPUARMState *env, int el, bool sm)  in sve_vqm1_for_el_sm()  argument
7230     if (el <= 1 && !el_is_in_host(env, el)) {  in sve_vqm1_for_el_sm()
7233     if (el <= 2 && arm_is_el2_enabled(env)) {  in sve_vqm1_for_el_sm()
7250 uint32_t sve_vqm1_for_el(CPUARMState *env, int el)  in sve_vqm1_for_el()  argument
7252     return sve_vqm1_for_el_sm(env, el, FIELD_EX64(env->svcr, SVCR, SM));  in sve_vqm1_for_el()
7299     int el = arm_current_el(env);  in access_tpidr2()  local
7301     if (el == 0) {  in access_tpidr2()
7302         uint64_t sctlr = arm_sctlr(env, el);  in access_tpidr2()
7308     if (el < 3  in access_tpidr2()
7705     int el = arm_current_el(env);  in access_lor_ns()  local
7707     if (el < 2 && (arm_hcr_el2_eff(env) & HCR_TLOR)) {  in access_lor_ns()
7710     if (el < 3 && (env->cp15.scr_el3 & SCR_TLOR)) {  in access_lor_ns()
7763     int el = arm_current_el(env);  in access_pauth()  local
7765     if (el < 2 &&  in access_pauth()
7770     if (el < 3 &&  in access_pauth()
8136     int el = arm_current_el(env);  in access_mte()  local
8137     if (el < 2 && arm_is_el2_enabled(env)) {  in access_mte()
8143     if (el < 3 &&  in access_mte()
8172     int el = arm_current_el(env);  in access_tfsr_el2()  local
8174     if (el == 1 && (arm_hcr_el2_eff(env) & HCR_NV2)) {  in access_tfsr_el2()
8177     if (el < 2 && arm_is_el2_enabled(env)) {  in access_tfsr_el2()
8183     if (el < 3 &&  in access_tfsr_el2()
8339     int el = arm_current_el(env);  in access_scxtnum()  local
8341     if (el == 0 && !((hcr & HCR_E2H) && (hcr & HCR_TGE))) {  in access_scxtnum()
8348     } else if (el < 2 && (env->cp15.sctlr_el[2] & SCTLR_TSCXT)) {  in access_scxtnum()
8351     if (el < 2 && arm_is_el2_enabled(env) && !(hcr & HCR_ENSCXT)) {  in access_scxtnum()
8354     if (el < 3  in access_scxtnum()
8461     int el = arm_current_el(env);  in access_predinv()  local
8463     if (el == 0) {  in access_predinv()
8464         uint64_t sctlr = arm_sctlr(env, el);  in access_predinv()
8468     } else if (el == 1) {  in access_predinv()
11860 uint64_t arm_sctlr(CPUARMState *env, int el)  in arm_sctlr()  argument
11864         el = 3;  in arm_sctlr()
11865     } else if (el == 0) {  in arm_sctlr()
11868         el = mmu_idx == ARMMMUIdx_E20_0 ? 2 : 1;  in arm_sctlr()
11870     return env->cp15.sctlr_el[el];  in arm_sctlr()
12562 ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el)  in arm_mmu_idx_el()  argument
12572     switch (el) {  in arm_mmu_idx_el()
12771 static uint32_t sve_vqm1_for_el_sm_ena(CPUARMState *env, int el, bool sm)  in sve_vqm1_for_el_sm_ena()  argument
12776         exc_el = sme_exception_el(env, el);  in sve_vqm1_for_el_sm_ena()
12778         exc_el = sve_exception_el(env, el);  in sve_vqm1_for_el_sm_ena()
12783     return sve_vqm1_for_el_sm(env, el, sm);  in sve_vqm1_for_el_sm_ena()