pl011/src/lib.rs

47 pub mod device;
48 pub mod device_class;
49 pub mod memory_ops;
51 pub const TYPE_PL011: &::std::ffi::CStr = c_str!("pl011");
52 pub const TYPE_PL011_LUMINARY: &::std::ffi::CStr = c_str!("pl011_luminary");
62 pub enum RegisterOffset {
144 pub mod registers {
200     pub struct Data {
202         pub data: u8,
203         pub framing_error: bool,
204         pub parity_error: bool,
205         pub break_error: bool,
206         pub overrun_error: bool,
235     pub struct ReceiveStatusErrorClear {
236         pub framing_error: bool,
237         pub parity_error: bool,
238         pub break_error: bool,
239         pub overrun_error: bool,
244         pub fn reset(&mut self) {  in reset()
260     pub struct Flags {
264         pub clear_to_send: bool,
268         pub data_set_ready: bool,
272         pub data_carrier_detect: bool,
279         pub busy: bool,
285         pub receive_fifo_empty: bool,
291         pub transmit_fifo_full: bool,
297         pub receive_fifo_full: bool,
305         pub transmit_fifo_empty: bool,
307         pub ring_indicator: bool,
312         pub fn reset(&mut self) {  in reset()
334     pub struct LineControl {
345         pub sticky_parity: bool,
351         pub word_length: WordLength,
356         pub fifos_enabled: Mode,
360         pub two_stops_bits: bool,
370         pub parity: Parity,
377         pub parity_enabled: bool,
385         pub send_break: bool,
389         pub fn reset(&mut self) {  in reset()
405     pub enum Parity {
418     pub enum Mode {
438     pub enum WordLength {
459     pub struct Control {
465         pub enable_uart: bool,
473         pub enable_sir: bool,
481         pub sir_lowpower_irda_mode: u1,
497         pub enable_loopback: bool,
503         pub enable_transmit: bool,
509         pub enable_receive: bool,
513         pub data_transmit_ready: bool,
517         pub request_to_send: bool,
521         pub out_1: bool,
525         pub out_2: bool,
529         pub rts_hardware_flow_control_enable: bool,
533         pub cts_hardware_flow_control_enable: bool,
537         pub fn reset(&mut self) {  in reset()
553     pub const INT_OE: u32 = 1 << 10;
554     pub const INT_BE: u32 = 1 << 9;
555     pub const INT_PE: u32 = 1 << 8;
556     pub const INT_FE: u32 = 1 << 7;
557     pub const INT_RT: u32 = 1 << 6;
558     pub const INT_TX: u32 = 1 << 5;
559     pub const INT_RX: u32 = 1 << 4;
560     pub const INT_DSR: u32 = 1 << 3;
561     pub const INT_DCD: u32 = 1 << 2;
562     pub const INT_CTS: u32 = 1 << 1;
563     pub const INT_RI: u32 = 1 << 0;
564     pub const INT_E: u32 = INT_OE | INT_BE | INT_PE | INT_FE;
565     pub const INT_MS: u32 = INT_RI | INT_DSR | INT_DCD | INT_CTS;
568     pub enum Interrupt {
583         pub const E: u32 = INT_OE | INT_BE | INT_PE | INT_FE;
584         pub const MS: u32 = INT_RI | INT_DSR | INT_DCD | INT_CTS;