pl011/src/lib.rs

170     /// prefixed with a start bit, appended with the appropriate parity bit
171     /// (if parity is enabled), and a stop bit. The resultant word is then
177     ///   frame, parity,
215     /// information for break, framing and parity corresponds to the
337         /// 7 SPS Stick parity select.
338         /// 0 = stick parity is disabled
340         /// • if the EPS bit is 0 then the parity bit is transmitted and checked
341         /// as a 1 • if the EPS bit is 1 then the parity bit is
343         /// the PEN bit disables parity checking and generation. See Table 3-11
344         /// on page 3-14 for the parity truth table.
361         /// EPS Even parity select. Controls the type of parity the UART uses
363         /// - 0 = odd parity. The UART generates or checks for an odd number of
364         ///   1s in the data and parity bits.
365         /// - 1 = even parity. The UART generates or checks for an even number
366         ///   of 1s in the data and parity bits.
367         /// This bit has no effect when the `PEN` bit disables parity checking
368         /// and generation. See Table 3-11 on page 3-14 for the parity
370         pub parity: Parity,  field
371         /// 1 PEN Parity enable:
373         /// - 0 = parity is disabled and no parity bit added to the data frame
374         /// - 1 = parity checking and generation is enabled.
376         /// See Table 3-11 on page 3-14 for the parity truth table.
403     /// `EPS` "Even parity select", field of [Line Control
405     pub enum Parity {  enum
406         /// - 0 = odd parity. The UART generates or checks for an odd number of
407         ///   1s in the data and parity bits.
409         /// - 1 = even parity. The UART generates or checks for an even number
410         ///   of 1s in the data and parity bits.