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1 # -*- Mode: Python -*-
32 # @cxl-inject-general-media-event:
42 # @flags: Event Record Flags. See CXL r3.0 Table 8-42 Common Event
46 # lower bits include some flags. See CXL r3.0 Table 8-43 General
50 # information. See CXL r3.0 Table 8-43 General Media Event
53 # @type: Type of memory event that occurred. See CXL r3.0 Table 8-43
57 # @transaction-type: Type of first transaction that caused the event
58 # to occur. See CXL r3.0 Table 8-43 General Media Event Record,
70 # @component-id: Device specific component identifier for the event.
71 # May describe a field replaceable sub-component of the device.
75 { 'command': 'cxl-inject-general-media-event',
78 'type': 'uint8', 'transaction-type': 'uint8',
80 '*device': 'uint32', '*component-id': 'str' } }
83 # @cxl-inject-dram-event:
93 # @flags: Event Record Flags. See CXL r3.0 Table 8-42 Common Event
97 # lower bits include some flags. See CXL r3.0 Table 8-44 DRAM
101 # information. See CXL r3.0 Table 8-44 DRAM Event Record, Memory
104 # @type: Type of memory event that occurred. See CXL r3.0 Table 8-44
107 # @transaction-type: Type of first transaction that caused the event
108 # to occur. See CXL r3.0 Table 8-44 DRAM Event Record,
117 # @nibble-mask: Identifies one or more nibbles that the error affects
119 # @bank-group: Bank group of the memory event location, incorporating
122 # @bank: Bank of the memory event location. A single bank is accessed
129 # @correction-mask: Bits within each nibble. Used in order of bits
130 # set in the nibble-mask. Up to 4 nibbles may be covered.
134 { 'command': 'cxl-inject-dram-event',
137 'type': 'uint8', 'transaction-type': 'uint8',
138 '*channel': 'uint8', '*rank': 'uint8', '*nibble-mask': 'uint32',
139 '*bank-group': 'uint8', '*bank': 'uint8', '*row': 'uint32',
140 '*column': 'uint16', '*correction-mask': [ 'uint64' ]
144 # @cxl-inject-memory-module-event:
154 # @flags: Event Record Flags. See CXL r3.0 Table 8-42 Common Event
157 # @type: Device Event Type. See CXL r3.0 Table 8-45 Memory Module
160 # @health-status: Overall health summary bitmap. See CXL r3.0 Table
161 # 8-100 Get Health Info Output Payload, Health Status for bit
164 # @media-status: Overall media health summary. See CXL r3.0 Table
165 # 8-100 Get Health Info Output Payload, Media Status for bit
168 # @additional-status: See CXL r3.0 Table 8-100 Get Health Info Output
171 # @life-used: Percentage (0-100) of factory expected life span.
175 # @dirty-shutdown-count: Number of times the device has been unable to
178 # @corrected-volatile-error-count: Total number of correctable errors
181 # @corrected-persistent-error-count: Total number of correctable
186 { 'command': 'cxl-inject-memory-module-event',
188 'type': 'uint8', 'health-status': 'uint8',
189 'media-status': 'uint8', 'additional-status': 'uint8',
190 'life-used': 'uint8', 'temperature' : 'int16',
191 'dirty-shutdown-count': 'uint32',
192 'corrected-volatile-error-count': 'uint32',
193 'corrected-persistent-error-count': 'uint32'
197 # @cxl-inject-poison:
214 { 'command': 'cxl-inject-poison',
224 # @cache-data-parity: Data error such as data parity or data ECC error
227 # @cache-address-parity: Address parity or other errors associated
230 # @cache-be-parity: Byte enable parity or other byte enable errors on
233 # @cache-data-ecc: ECC error on CXL.cache
235 # @mem-data-parity: Data error such as data parity or data ECC error
238 # @mem-address-parity: Address parity or other errors associated with
241 # @mem-be-parity: Byte enable parity or other byte enable errors on
244 # @mem-data-ecc: Data ECC error on CXL.mem.
246 # @reinit-threshold: REINIT threshold hit.
248 # @rsvd-encoding: Received unrecognized encoding.
250 # @poison-received: Received poison from the peer.
252 # @receiver-overflow: Buffer overflows (first 3 bits of header log
257 # @cxl-ide-tx: Integrity and data encryption tx error.
259 # @cxl-ide-rx: Integrity and data encryption rx error.
265 'data': ['cache-data-parity',
266 'cache-address-parity',
267 'cache-be-parity',
268 'cache-data-ecc',
269 'mem-data-parity',
270 'mem-address-parity',
271 'mem-be-parity',
272 'mem-data-ecc',
273 'reinit-threshold',
274 'rsvd-encoding',
275 'poison-received',
276 'receiver-overflow',
278 'cxl-ide-tx',
279 'cxl-ide-rx'
286 # Record of a single error including header log.
302 # @cxl-inject-uncorrectable-errors:
313 { 'command': 'cxl-inject-uncorrectable-errors',
322 # @cache-data-ecc: Data ECC error on CXL.cache
324 # @mem-data-ecc: Data ECC error on CXL.mem
326 # @crc-threshold: Component specific and applicable to 68 byte Flit
329 # @retry-threshold: Retry threshold hit in the Local Retry State
332 # @cache-poison-received: Received poison from a peer on CXL.cache.
334 # @mem-poison-received: Received poison from a peer on CXL.mem
341 'data': ['cache-data-ecc',
342 'mem-data-ecc',
343 'crc-threshold',
344 'retry-threshold',
345 'cache-poison-received',
346 'mem-poison-received',
351 # @cxl-inject-correctable-error:
353 # Command to inject a single correctable error. Multiple error
365 {'command': 'cxl-inject-correctable-error',
371 # A single dynamic capacity extent. This is a contiguous allocation
372 # of memory by Device Physical Address within a single Dynamic
393 # capacity, as defined in Compute Express Link (CXL) Specification,
394 # Revision 3.1, Table 7-70.
401 # memory capacity but must do so as a single contiguous
408 # @enable-shared-access: Capacity has already been allocated to a
427 'enable-shared-access']
431 # @cxl-add-dynamic-capacity:
434 # operations defined in Compute Express Link (CXL) Specification,
441 # @host-id: The "Host ID" field as defined in Compute Express Link
442 # (CXL) Specification, Revision 3.1, Table 7-70.
444 # @selection-policy: The "Selection Policy" bits as defined in
445 # Compute Express Link (CXL) Specification, Revision 3.1,
446 # Table 7-70. It specifies the policy to use for selecting
450 # Link (CXL) Specification, Revision 3.1, Table 7-70. Valid
451 # range is from 0-7.
453 # @tag: The "Tag" field as defined in Compute Express Link (CXL)
454 # Specification, Revision 3.1, Table 7-70.
456 # @extents: The "Extent List" field as defined in Compute Express Link
457 # (CXL) Specification, Revision 3.1, Table 7-70.
465 { 'command': 'cxl-add-dynamic-capacity',
467 'host-id': 'uint16',
468 'selection-policy': 'CxlExtentSelectionPolicy',
480 # capacity, defined in the "Flags" field in Compute Express Link (CXL)
481 # Specification, Revision 3.1, Table 7-71.
483 # @tag-based: Extents are selected by the device based on tag, with
492 'data': ['tag-based',
497 # @cxl-release-dynamic-capacity:
500 # simulates operations defined in Compute Express Link (CXL)
507 # @host-id: The "Host ID" field as defined in Compute Express Link
508 # (CXL) Specification, Revision 3.1, Table 7-71.
510 # @removal-policy: Bit[3:0] of the "Flags" field as defined in
511 # Compute Express Link (CXL) Specification, Revision 3.1,
512 # Table 7-71.
514 # @forced-removal: Bit[4] of the "Flags" field in Compute Express
515 # Link (CXL) Specification, Revision 3.1, Table 7-71. When set,
520 # @sanitize-on-release: Bit[5] of the "Flags" field in Compute Express
521 # Link (CXL) Specification, Revision 3.1, Table 7-71. When set,
529 # Link Specification, Revision 3.1, Table 7-71. Valid range
530 # is from 0-7.
532 # @tag: The "Tag" field as defined in Compute Express Link (CXL)
533 # Specification, Revision 3.1, Table 7-71.
536 # Link (CXL) Specification, Revision 3.1, Table 7-71.
544 { 'command': 'cxl-release-dynamic-capacity',
546 'host-id': 'uint16',
547 'removal-policy': 'CxlExtentRemovalPolicy',
548 '*forced-removal': 'bool',
549 '*sanitize-on-release': 'bool',