Lines Matching +full:0 +full:x0400000
45 #define TARGET_ARCH_HAS_SIGTRAMP_PAGE 0
67 ADDR_NO_RANDOMIZE = 0x0040000, /* disable randomization of VA space */
68 FDPIC_FUNCPTRS = 0x0080000, /* userspace function ptrs point to
70 MMAP_PAGE_ZERO = 0x0100000,
71 ADDR_COMPAT_LAYOUT = 0x0200000,
72 READ_IMPLIES_EXEC = 0x0400000,
73 ADDR_LIMIT_32BIT = 0x0800000,
74 SHORT_INODE = 0x1000000,
75 WHOLE_SECONDS = 0x2000000,
76 STICKY_TIMEOUTS = 0x4000000,
77 ADDR_LIMIT_3GB = 0x8000000,
87 PER_LINUX = 0x0000,
88 PER_LINUX_32BIT = 0x0000 | ADDR_LIMIT_32BIT,
89 PER_LINUX_FDPIC = 0x0000 | FDPIC_FUNCPTRS,
90 PER_SVR4 = 0x0001 | STICKY_TIMEOUTS | MMAP_PAGE_ZERO,
91 PER_SVR3 = 0x0002 | STICKY_TIMEOUTS | SHORT_INODE,
92 PER_SCOSVR3 = 0x0003 | STICKY_TIMEOUTS | WHOLE_SECONDS | SHORT_INODE,
93 PER_OSR5 = 0x0003 | STICKY_TIMEOUTS | WHOLE_SECONDS,
94 PER_WYSEV386 = 0x0004 | STICKY_TIMEOUTS | SHORT_INODE,
95 PER_ISCR4 = 0x0005 | STICKY_TIMEOUTS,
96 PER_BSD = 0x0006,
97 PER_SUNOS = 0x0006 | STICKY_TIMEOUTS,
98 PER_XENIX = 0x0007 | STICKY_TIMEOUTS | SHORT_INODE,
99 PER_LINUX32 = 0x0008,
100 PER_LINUX32_3GB = 0x0008 | ADDR_LIMIT_3GB,
101 PER_IRIX32 = 0x0009 | STICKY_TIMEOUTS,/* IRIX5 32-bit */
102 PER_IRIXN32 = 0x000a | STICKY_TIMEOUTS,/* IRIX6 new 32-bit */
103 PER_IRIX64 = 0x000b | STICKY_TIMEOUTS,/* IRIX6 64-bit */
104 PER_RISCOS = 0x000c,
105 PER_SOLARIS = 0x000d | STICKY_TIMEOUTS,
106 PER_UW7 = 0x000e | STICKY_TIMEOUTS | MMAP_PAGE_ZERO,
107 PER_OSF4 = 0x000f, /* OSF/1 v4 */
108 PER_HPUX = 0x0010,
109 PER_MASK = 0x00ff,
124 #define MAP_DENYWRITE 0
174 regs->rax = 0; in init_thread()
191 (*regs)[0] = tswapreg(env->regs[15]); in elf_core_copy_regs()
208 (*regs)[17] = tswapreg(env->segs[R_CS].selector & 0xffff); in elf_core_copy_regs()
211 (*regs)[20] = tswapreg(env->segs[R_SS].selector & 0xffff); in elf_core_copy_regs()
212 (*regs)[21] = tswapreg(env->segs[R_FS].selector & 0xffff); in elf_core_copy_regs()
213 (*regs)[22] = tswapreg(env->segs[R_GS].selector & 0xffff); in elf_core_copy_regs()
214 (*regs)[23] = tswapreg(env->segs[R_DS].selector & 0xffff); in elf_core_copy_regs()
215 (*regs)[24] = tswapreg(env->segs[R_ES].selector & 0xffff); in elf_core_copy_regs()
216 (*regs)[25] = tswapreg(env->segs[R_FS].selector & 0xffff); in elf_core_copy_regs()
217 (*regs)[26] = tswapreg(env->segs[R_GS].selector & 0xffff); in elf_core_copy_regs()
230 if (reserved_va != 0 && in init_guest_commpage()
265 elf_platform[1] = '0' + family; in get_elf_platform()
282 A value of 0 tells we have no such handler. */ in init_thread()
283 regs->edx = 0; in init_thread()
298 (*regs)[0] = tswapreg(env->regs[R_EBX]); in elf_core_copy_regs()
305 (*regs)[7] = tswapreg(env->segs[R_DS].selector & 0xffff); in elf_core_copy_regs()
306 (*regs)[8] = tswapreg(env->segs[R_ES].selector & 0xffff); in elf_core_copy_regs()
307 (*regs)[9] = tswapreg(env->segs[R_FS].selector & 0xffff); in elf_core_copy_regs()
308 (*regs)[10] = tswapreg(env->segs[R_GS].selector & 0xffff); in elf_core_copy_regs()
311 (*regs)[13] = tswapreg(env->segs[R_CS].selector & 0xffff); in elf_core_copy_regs()
314 (*regs)[16] = tswapreg(env->segs[R_SS].selector & 0xffff); in elf_core_copy_regs()
327 } while (0)
351 memset(regs, 0, sizeof(*regs)); in init_thread()
357 regs->uregs[15] = infop->entry & 0xfffffffe; in init_thread()
363 regs->uregs[0] = 0; in init_thread()
382 regs->uregs[8] = 0; in init_thread()
393 (*regs)[0] = tswapreg(env->regs[0]); in elf_core_copy_regs()
411 (*regs)[17] = tswapreg(env->regs[0]); /* XXX */ in elf_core_copy_regs()
419 ARM_HWCAP_ARM_SWP = 1 << 0,
450 ARM_HWCAP2_ARM_AES = 1 << 0,
461 #define HI_COMMPAGE (intptr_t)0xffff0f00u
484 -1, 0); in init_guest_commpage()
494 /* Set kernel helper versions; rest of page is 0. */ in init_guest_commpage()
495 __put_user(5, (uint32_t *)g2h_untagged(0xffff0ffcu)); in init_guest_commpage()
513 uint32_t hwcaps = 0; in get_elf_hwcap()
522 do { if (arm_feature(&cpu->env, feat)) { hwcaps |= hwcap; } } while (0) in get_elf_hwcap()
525 do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0) in get_elf_hwcap()
565 uint64_t hwcaps = 0; in get_elf_hwcap2()
694 memset(regs, 0, sizeof(*regs)); in init_thread()
696 regs->pc = infop->entry & ~0x3ULL; in init_thread()
708 for (i = 0; i < 32; i++) { in elf_core_copy_regs()
719 ARM_HWCAP_A64_FP = 1 << 0,
752 ARM_HWCAP2_A64_DCPODP = 1 << 0,
803 do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
808 uint32_t hwcaps = 0; in get_elf_hwcap()
848 uint64_t hwcaps = 0; in get_elf_hwcap2()
1020 r |= features & CPU_FEATURE_FSMULD ? HWCAP_SPARC_FSMULD : 0; in get_elf_hwcap()
1021 r |= features & CPU_FEATURE_VIS1 ? HWCAP_SPARC_VIS : 0; in get_elf_hwcap()
1022 r |= features & CPU_FEATURE_VIS2 ? HWCAP_SPARC_VIS2 : 0; in get_elf_hwcap()
1023 r |= features & CPU_FEATURE_FMAF ? HWCAP_SPARC_FMAF : 0; in get_elf_hwcap()
1024 r |= features & CPU_FEATURE_VIS3 ? HWCAP_SPARC_VIS3 : 0; in get_elf_hwcap()
1025 r |= features & CPU_FEATURE_IMA ? HWCAP_SPARC_IMA : 0; in get_elf_hwcap()
1037 regs->y = 0; in init_thread()
1065 QEMU_PPC_FEATURE_32 = 0x80000000,
1066 QEMU_PPC_FEATURE_64 = 0x40000000,
1067 QEMU_PPC_FEATURE_601_INSTR = 0x20000000,
1068 QEMU_PPC_FEATURE_HAS_ALTIVEC = 0x10000000,
1069 QEMU_PPC_FEATURE_HAS_FPU = 0x08000000,
1070 QEMU_PPC_FEATURE_HAS_MMU = 0x04000000,
1071 QEMU_PPC_FEATURE_HAS_4xxMAC = 0x02000000,
1072 QEMU_PPC_FEATURE_UNIFIED_CACHE = 0x01000000,
1073 QEMU_PPC_FEATURE_HAS_SPE = 0x00800000,
1074 QEMU_PPC_FEATURE_HAS_EFP_SINGLE = 0x00400000,
1075 QEMU_PPC_FEATURE_HAS_EFP_DOUBLE = 0x00200000,
1076 QEMU_PPC_FEATURE_NO_TB = 0x00100000,
1077 QEMU_PPC_FEATURE_POWER4 = 0x00080000,
1078 QEMU_PPC_FEATURE_POWER5 = 0x00040000,
1079 QEMU_PPC_FEATURE_POWER5_PLUS = 0x00020000,
1080 QEMU_PPC_FEATURE_CELL = 0x00010000,
1081 QEMU_PPC_FEATURE_BOOKE = 0x00008000,
1082 QEMU_PPC_FEATURE_SMT = 0x00004000,
1083 QEMU_PPC_FEATURE_ICACHE_SNOOP = 0x00002000,
1084 QEMU_PPC_FEATURE_ARCH_2_05 = 0x00001000,
1085 QEMU_PPC_FEATURE_PA6T = 0x00000800,
1086 QEMU_PPC_FEATURE_HAS_DFP = 0x00000400,
1087 QEMU_PPC_FEATURE_POWER6_EXT = 0x00000200,
1088 QEMU_PPC_FEATURE_ARCH_2_06 = 0x00000100,
1089 QEMU_PPC_FEATURE_HAS_VSX = 0x00000080,
1090 QEMU_PPC_FEATURE_PSERIES_PERFMON_COMPAT = 0x00000040,
1092 QEMU_PPC_FEATURE_TRUE_LE = 0x00000002,
1093 QEMU_PPC_FEATURE_PPC_LE = 0x00000001,
1096 QEMU_PPC_FEATURE2_ARCH_2_07 = 0x80000000, /* ISA 2.07 */
1097 QEMU_PPC_FEATURE2_HAS_HTM = 0x40000000, /* Hardware Transactional Memory */
1098 QEMU_PPC_FEATURE2_HAS_DSCR = 0x20000000, /* Data Stream Control Register */
1099 QEMU_PPC_FEATURE2_HAS_EBB = 0x10000000, /* Event Base Branching */
1100 QEMU_PPC_FEATURE2_HAS_ISEL = 0x08000000, /* Integer Select */
1101 QEMU_PPC_FEATURE2_HAS_TAR = 0x04000000, /* Target Address Register */
1102 QEMU_PPC_FEATURE2_VEC_CRYPTO = 0x02000000,
1103 QEMU_PPC_FEATURE2_HTM_NOSC = 0x01000000,
1104 QEMU_PPC_FEATURE2_ARCH_3_00 = 0x00800000, /* ISA 3.00 */
1105 QEMU_PPC_FEATURE2_HAS_IEEE128 = 0x00400000, /* VSX IEEE Bin Float 128-bit */
1106 QEMU_PPC_FEATURE2_DARN = 0x00200000, /* darn random number insn */
1107 QEMU_PPC_FEATURE2_SCV = 0x00100000, /* scv syscall */
1108 QEMU_PPC_FEATURE2_HTM_NO_SUSPEND = 0x00080000, /* TM w/o suspended state */
1109 QEMU_PPC_FEATURE2_ARCH_3_1 = 0x00040000, /* ISA 3.1 */
1110 QEMU_PPC_FEATURE2_MMA = 0x00020000, /* Matrix-Multiply Assist */
1118 uint32_t features = 0; in get_elf_hwcap()
1123 do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0) in get_elf_hwcap()
1129 } while (0) in get_elf_hwcap()
1154 uint32_t features = 0; in get_elf_hwcap2()
1157 do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0) in get_elf_hwcap2()
1159 do { if (cpu->env.insns_flags2 & flag) { features |= feature; } } while (0) in get_elf_hwcap2()
1179 * - keep the final alignment of sp (sp & 0xf)
1198 NEW_AUX_ENT(AT_UCACHEBSIZE, 0); \
1199 } while (0)
1225 target_ulong ccr = 0; in elf_core_copy_regs()
1227 for (i = 0; i < ARRAY_SIZE(env->gpr); i++) { in elf_core_copy_regs()
1267 /*Set crmd PG,DA = 1,0 */ in init_thread()
1278 TARGET_EF_R0 = 0,
1288 (*regs)[TARGET_EF_R0] = 0; in elf_core_copy_regs()
1305 HWCAP_LOONGARCH_CPUCFG = (1 << 0),
1323 uint32_t hwcaps = 0; in get_elf_hwcap()
1374 { return _base_platform; } } while (0)
1416 TARGET_EF_R0 = 0,
1435 for (i = 0; i < TARGET_EF_R0; i++) { in elf_core_copy_regs()
1436 (*regs)[i] = 0; in elf_core_copy_regs()
1438 (*regs)[TARGET_EF_R0] = 0; in elf_core_copy_regs()
1444 (*regs)[TARGET_EF_R26] = 0; in elf_core_copy_regs()
1445 (*regs)[TARGET_EF_R27] = 0; in elf_core_copy_regs()
1446 (*regs)[TARGET_EF_LO] = tswapreg(env->active_tc.LO[0]); in elf_core_copy_regs()
1447 (*regs)[TARGET_EF_HI] = tswapreg(env->active_tc.HI[0]); in elf_core_copy_regs()
1459 HWCAP_MIPS_R6 = (1 << 0),
1479 do { if (cpu->env.insn_flags & (_flag)) { hwcaps |= _hwcap; } } while (0)
1482 do { if (cpu->env._reg & (_mask)) { hwcaps |= _hwcap; } } while (0)
1489 } while (0)
1494 uint32_t hwcaps = 0; in get_elf_hwcap()
1535 int i, pos = 0; in elf_core_copy_regs()
1537 for (i = 0; i < 32; i++) { in elf_core_copy_regs()
1543 (*regs)[pos++] = 0; in elf_core_copy_regs()
1545 (*regs)[pos++] = 0; in elf_core_copy_regs()
1576 for (i = 0; i < 32; i++) { in elf_core_copy_regs()
1582 #define ELF_HWCAP 0
1620 for (i = 0; i < 16; i++) { in elf_core_copy_regs()
1630 (*regs)[TARGET_REG_SYSCALL] = 0; /* FIXME */ in elf_core_copy_regs()
1637 SH_CPU_HAS_FPU = 0x0001, /* Hardware FPU support */
1638 SH_CPU_HAS_P2_FLUSH_BUG = 0x0002, /* Need to flush the cache in P2 area */
1639 SH_CPU_HAS_MMU_PAGE_ASSOC = 0x0004, /* SH3: TLB way selection bit support */
1640 SH_CPU_HAS_DSP = 0x0008, /* SH-DSP: DSP support */
1641 SH_CPU_HAS_PERF_COUNTER = 0x0010, /* Hardware performance counters */
1642 SH_CPU_HAS_PTEA = 0x0020, /* PTEA register */
1643 SH_CPU_HAS_LLSC = 0x0040, /* movli.l/movco.l */
1644 SH_CPU_HAS_L2_CACHE = 0x0080, /* Secondary cache / URAM */
1645 SH_CPU_HAS_OP32 = 0x0100, /* 32-bit instruction support */
1646 SH_CPU_HAS_PTEAEX = 0x0200, /* PTE ASID Extension support */
1654 uint32_t hwcap = 0; in get_elf_hwcap()
1679 regs->sr = 0; in init_thread()
1689 (*regs)[0] = tswapreg(env->dregs[1]); in elf_core_copy_regs()
1696 (*regs)[7] = tswapreg(env->aregs[0]); in elf_core_copy_regs()
1703 (*regs)[14] = tswapreg(env->dregs[0]); in elf_core_copy_regs()
1705 (*regs)[16] = tswapreg(env->dregs[0]); /* FIXME: orig_d0 */ in elf_core_copy_regs()
1708 (*regs)[19] = 0; /* FIXME: regs->format | regs->vector */ in elf_core_copy_regs()
1744 do { if (s390_has_feat(_feat)) { hwcap |= _hwcap; } } while (0)
1813 TARGET_REG_PSWM = 0,
1828 for (i = 0; i < 16; i++) { in elf_core_copy_regs()
1832 for (i = 0; i < 16; i++) { in elf_core_copy_regs()
1835 (*regs)[TARGET_REG_ORIG_R2] = 0; in elf_core_copy_regs()
1887 #define STACK_GROWS_DOWN 0
1895 regs->iaoq[0] = infop->entry | PRIV_USER; in init_thread()
1896 regs->iaoq[1] = regs->iaoq[0] + 4; in init_thread()
1897 regs->gr[23] = 0; in init_thread()
1905 #define LO_COMMPAGE 0
1909 /* If reserved_va, then we have already mapped 0 page on the host. */ in init_guest_commpage()
1915 MAP_ANONYMOUS | MAP_PRIVATE | MAP_FIXED_NOREPLACE, -1, 0); in init_guest_commpage()
1947 regs->windowbase = 0; in init_thread()
1994 for (i = 0; i < env->config->nareg; ++i) { in elf_core_copy_regs()
2039 #define ELF_HWCAP 0
2092 #define ARCH_USE_GNU_PROPERTY 0
2109 #define N_MAGIC(exec) ((exec).a_info & 0xffff)
2143 for (i = 0; i < phnum; ++i, ++phdr) { in bswap_phdr()
2158 for (i = 0; i < shnum; ++i, ++shdr) { in bswap_shdr()
2244 return 0; /* bullet-proofing */ in copy_elf_strings()
2249 for (i = argc - 1; i >= 0; --i) { in copy_elf_strings()
2259 return 0; in copy_elf_strings()
2270 if (offset == 0) { in copy_elf_strings()
2282 for (i = 0; i < argc; ++i) { in copy_elf_strings()
2290 return 0; in copy_elf_strings()
2302 if (remaining == 0) { in copy_elf_strings()
2342 guard = 0; in setup_arg_pages()
2349 error = target_mmap(0, size + guard, prot, in setup_arg_pages()
2350 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); in setup_arg_pages()
2414 memset(g2h_untagged(start_bss), 0, align_bss - start_bss); in zero_bss()
2420 MAP_FIXED | MAP_PRIVATE | MAP_ANON, -1, 0) == -1) { in zero_bss()
2441 return 0; in elf_is_fdpic()
2454 put_user_u32(loadsegs[n].addr, sp+0); in loader_build_fdpic_loadmap()
2461 put_user_u16(0, sp+0); /* version */ in loader_build_fdpic_loadmap()
2500 info->interpreter_loadmap_addr = 0; in create_elf_tables()
2501 info->interpreter_pt_dynamic_addr = 0; in create_elf_tables()
2505 u_base_platform = 0; in create_elf_tables()
2521 u_platform = 0; in create_elf_tables()
2607 } while(0) in create_elf_tables()
2623 NEW_AUX_ENT(AT_BASE, (abi_ulong)(interp_info ? interp_info->load_addr : 0)); in create_elf_tables()
2624 NEW_AUX_ENT(AT_FLAGS, (abi_ulong)0); in create_elf_tables()
2649 NEW_AUX_ENT (AT_NULL, 0); in create_elf_tables()
2660 for (i = 0; i < argc; ++i) { in create_elf_tables()
2665 put_user_ual(0, u_argv); in create_elf_tables()
2668 for (i = 0; i < envc; ++i) { in create_elf_tables()
2673 put_user_ual(0, u_envp); in create_elf_tables()
2681 #define HI_COMMPAGE 0
2683 #define HI_COMMPAGE 0
2697 * return 0 if it is not available to map, and -1 on mmap error.
2705 MAP_NORESERVE | MAP_FIXED_NOREPLACE, -1, 0); in pgb_try_mmap()
2709 return errno == EEXIST ? 0 : -1; in pgb_try_mmap()
2733 return 0; in pgb_try_mmap_skip_brk()
2745 * On success, retain the mapping at index 0 for reserved_va.
2755 for (int i = ga->nbounds - 1; i >= 0; --i) { in pgb_try_mmap_set()
2756 if (pgb_try_mmap_skip_brk(ga->bounds[i][0] + base, in pgb_try_mmap_set()
2758 brk, i == 0 && reserved_va) <= 0) { in pgb_try_mmap_set()
2787 if (guest_loaddr != 0 && guest_loaddr < mmap_min_addr) { in pgb_addr_set()
2792 memset(ga, 0, sizeof(*ga)); in pgb_addr_set()
2793 n = 0; in pgb_addr_set()
2796 ga->bounds[n][0] = try_identity ? mmap_min_addr : 0; in pgb_addr_set()
2799 /* LO_COMMPAGE and NULL handled by reserving from 0. */ in pgb_addr_set()
2803 ga->bounds[n][0] = 0; in pgb_addr_set()
2807 ga->bounds[n][0] = 0; in pgb_addr_set()
2814 ga->bounds[n][0] = guest_loaddr; in pgb_addr_set()
2823 * due to comparison between unsigned and (possible) 0. in pgb_addr_set()
2830 ga->bounds[n][0] = HI_COMMPAGE & qemu_real_host_page_mask(); in pgb_addr_set()
2853 uintptr_t brk = (uintptr_t)sbrk(0); in pgb_fixed()
2857 "host minimum alignment (0x%" PRIxPTR ")\n", in pgb_fixed()
2896 for (int i = ga->nbounds - 1; i >= 0; --i) { in pgb_try_itree()
2897 uintptr_t s = base + ga->bounds[i][0]; in pgb_try_itree()
2912 return 0; /* success */ in pgb_try_itree()
2928 if (skip == 0) { in pgb_find_itree()
2956 brk = (uintptr_t)sbrk(0); in pgb_dynamic()
2957 if (pgb_try_mmap_set(&ga, 0, brk)) { in pgb_dynamic()
2958 guest_base = 0; in pgb_dynamic()
2972 brk = (uintptr_t)sbrk(0); in pgb_dynamic()
2996 for (int i = 0; i < ga.nbounds; ++i) { in pgb_dynamic()
2997 error_printf(" %0*" PRIx64 "-%0*" PRIx64 "\n", in pgb_dynamic()
2998 w, (uint64_t)ga.bounds[i][0], in pgb_dynamic()
3016 "address space (0x%" PRIx64 " > 0x%lx)", in probe_guest_base()
3023 "than the host can provide (0x%" PRIx64 ")", in probe_guest_base()
3043 "@ 0x%" PRIx64 "\n", (uint64_t)guest_base); in probe_guest_base()
3047 /* The string "GNU\0" as a magic number. */
3073 pr_type = data[0]; in parse_elf_property()
3170 prev_type = 0; in parse_elf_properties()
3209 if (!imgsrc_read(ehdr, 0, sizeof(*ehdr), src, &err)) { in load_elf_image()
3230 info->nsegs = 0; in load_elf_image()
3231 info->pt_dynamic_addr = 0; in load_elf_image()
3239 loaddr = -1, hiaddr = 0; in load_elf_image()
3240 align = 0; in load_elf_image()
3242 for (i = 0; i < ehdr->e_phnum; ++i) { in load_elf_image()
3268 if (interp_name[eppnt->p_filesz - 1] != 0) { in load_elf_image()
3298 probe_guest_base(image_name, 0, hiaddr - loaddr); in load_elf_image()
3344 (ehdr->e_type == ET_EXEC ? MAP_FIXED_NOREPLACE : 0), in load_elf_image()
3345 -1, 0); in load_elf_image()
3370 for (i = 0; i < ehdr->e_phnum; ++i) { in load_elf_image()
3391 info->end_code = 0; in load_elf_image()
3393 info->end_data = 0; in load_elf_image()
3412 && (pinterp_name == NULL || *pinterp_name == 0) in load_elf_image()
3418 for (i = 0; i < ehdr->e_phnum; i++) { in load_elf_image()
3422 int elf_prot = 0; in load_elf_image()
3445 if (eppnt->p_filesz != 0) { in load_elf_image()
3491 if (info->end_data == 0) { in load_elf_image()
3524 if (fd < 0) { in load_elf_interp()
3531 if (retval < 0) { in load_elf_interp()
3574 for (unsigned i = 0, n = vdso->reloc_count; i < n; i++) { in load_elf_vdso()
3596 int result = 0; in symfind()
3632 : ((sym0->st_value > sym1->st_value) ? 1 : 0); in symcmp()
3639 int i, shnum, nsyms, sym_idx = 0, str_idx = 0; in load_symbols()
3654 for (i = 0; i < shnum; ++i) { in load_symbols()
3694 for (i = 0; i < nsyms; ) { in load_symbols()
3714 if (nsyms == 0) { in load_symbols()
3760 offset = lseek(fd, 0, SEEK_SET); in get_elf_eflags()
3762 return 0; in get_elf_eflags()
3766 return 0; in get_elf_eflags()
3770 return 0; in get_elf_eflags()
3775 return 0; in get_elf_eflags()
3781 return 0; in get_elf_eflags()
3801 memset(&interp_info, 0, sizeof(interp_info)); in load_elf_binary()
3861 if (strcmp(elf_interpreter, "/usr/lib/libc.so.1") == 0 in load_elf_binary()
3862 || strcmp(elf_interpreter, "/usr/lib/ld.so.1") == 0) { in load_elf_binary()
3865 /* Why this, you ask??? Well SVr4 maps page 0 as read-only, in load_elf_binary()
3869 target_mmap(0, TARGET_PAGE_SIZE, PROT_READ | PROT_EXEC, in load_elf_binary()
3871 -1, 0); in load_elf_binary()
3887 abi_long tramp_page = target_mmap(0, TARGET_PAGE_SIZE, in load_elf_binary()
3889 MAP_PRIVATE | MAP_ANON, -1, 0); in load_elf_binary()
3917 return 0; in load_elf_binary()
4050 return 0; in vma_dump_size()
4060 memcmp(g2h_untagged(start), ELFMAG, SELFMAG) == 0) { in vma_dump_size()
4061 return 0; in vma_dump_size()
4142 .pr_sid = getsid(0), in fill_prstatus_note()
4161 .pr_sid = getsid(0), in fill_prpsinfo_note()
4171 for (size_t i = 0; i < len; i++) { in fill_prpsinfo_note()
4172 if (psinfo.pr_psargs[i] == 0) { in fill_prpsinfo_note()
4216 bytes_written = 0; in dump_write()
4225 if (bytes_written < 0) { in dump_write()
4229 } else if (bytes_written == 0) { /* eof */ in dump_write()
4234 } while (bytes_left > 0); in dump_write()
4236 return (0); in dump_write()
4246 page_unprotect(start, 0); in wmr_page_unprotect_regions()
4253 return 0; in wmr_page_unprotect_regions()
4268 return 0; in wmr_count_and_size_regions()
4284 phdr->p_paddr = 0; in wmr_fill_region_phdr()
4289 phdr->p_flags = (flags & PAGE_READ ? PF_R : 0) in wmr_fill_region_phdr()
4290 | (flags & PAGE_WRITE_ORG ? PF_W : 0) in wmr_fill_region_phdr()
4291 | (flags & PAGE_EXEC ? PF_X : 0); in wmr_fill_region_phdr()
4296 return 0; in wmr_fill_region_phdr()
4306 return 0; in wmr_write_region()
4319 * 0 +----------------------+ \
4346 * Function returns 0 in case of success, negative errno otherwise.
4366 if (prctl(PR_GET_DUMPABLE) == 0) { in elf_core_dump()
4367 return 0; in elf_core_dump()
4370 if (getrlimit(RLIMIT_CORE, &dumpsize) < 0 || dumpsize.rlim_cur == 0) { in elf_core_dump()
4371 return 0; in elf_core_dump()
4384 memset(&css, 0, sizeof(css)); in elf_core_dump()
4387 cpus = 0; in elf_core_dump()
4405 errno = 0; in elf_core_dump()
4414 if (fd < 0) { in elf_core_dump()
4431 fill_elf_header(hptr, css.count + 1, ELF_MACHINE, 0); in elf_core_dump()
4454 fill_prstatus_note(dptr, cpu_iter, cpu_iter == cpu ? signr : 0); in elf_core_dump()
4457 if (dump_write(fd, header, data_offset) < 0) { in elf_core_dump()
4465 if (walk_memory_regions(&fd, wmr_write_region) < 0) { in elf_core_dump()
4468 errno = 0; in elf_core_dump()
4474 if (fd >= 0) { in elf_core_dump()