Lines Matching defs:ICH9LPCState

21 struct ICH9LPCState {  struct
23     PCIDevice d;
32     uint8_t irr[PCI_SLOT_MAX][PCI_NUM_PINS];
34     MC146818RtcState rtc;
35     APMState apm;
36     ICH9LPCPMRegs pm;
37     uint32_t sci_level; /* track sci level */
38     uint8_t sci_gsi;
41     struct {
43     } pin_strap;
47     uint8_t chip_config[ICH9_CC_SIZE];
54     uint8_t rst_cnt;
55     MemoryRegion rst_cnt_mem;
58     uint64_t smi_host_features;       /* guest-invisible, host endian */
59     uint8_t smi_host_features_le[8];  /* guest-visible, read-only, little
61     uint8_t smi_guest_features_le[8]; /* guest-visible, read-write, little
63     uint8_t smi_features_ok;          /* guest-visible, read-only; selecting it
65     uint64_t smi_negotiated_features; /* guest-invisible, host endian */
67     MemoryRegion rcrb_mem; /* root complex register block */
68     Notifier machine_ready;
70     qemu_irq gsi[IOAPIC_NUM_PINS];