hw/riscv/numa.h

28  * @ms: pointer to machine state
30  * Returns: number of sockets for a numa system and 1 for a non-numa system
32 int riscv_socket_count(const MachineState *ms);
36  * @ms: pointer to machine state
39  * Returns: first hartid for a valid socket and -1 for an invalid socket
41 int riscv_socket_first_hartid(const MachineState *ms, int socket_id);
45  * @ms: pointer to machine state
48  * Returns: last hartid for a valid socket and -1 for an invalid socket
50 int riscv_socket_last_hartid(const MachineState *ms, int socket_id);
54  * @ms: pointer to machine state
57  * Returns: number of harts for a valid socket and -1 for an invalid socket
59 int riscv_socket_hart_count(const MachineState *ms, int socket_id);
63  * @ms: pointer to machine state
68 uint64_t riscv_socket_mem_offset(const MachineState *ms, int socket_id);
72  * @ms: pointer to machine state
77 uint64_t riscv_socket_mem_size(const MachineState *ms, int socket_id);
81  * @ms: pointer to machine state
86 bool riscv_socket_check_hartids(const MachineState *ms, int socket_id);
90  * @ms: pointer to machine state
95 void riscv_socket_fdt_write_id(const MachineState *ms, const char *node_name,
100  * @ms: pointer to machine state
105 void riscv_socket_fdt_write_distance_matrix(const MachineState *ms);
108 riscv_numa_cpu_index_to_props(MachineState *ms, unsigned cpu_index);
110 int64_t riscv_numa_get_default_cpu_node_id(const MachineState *ms, int idx);
112 const CPUArchIdList *riscv_numa_possible_cpu_arch_ids(MachineState *ms);