Lines Matching refs:PPC_BITMASK
20 #define PBCQ_NEST_IRSN_COMP PPC_BITMASK(0, 18)
23 #define PBCQ_NEST_LSI_SRC PPC_BITMASK(0, 7)
53 #define PHB_LSI_SRC_ID PPC_BITMASK(5, 12)
64 #define PHB_DMAMSI_NID PPC_BITMASK(24, 31)
69 #define PHB_CA_BUS PPC_BITMASK(4, 11)
70 #define PHB_CA_DEV PPC_BITMASK(12, 16)
71 #define PHB_CA_FUNC PPC_BITMASK(17, 19)
72 #define PHB_CA_REG PPC_BITMASK(20, 31)
73 #define PHB_CA_PE PPC_BITMASK(40, 47)
77 #define PHB_IVT_BASE_ADDRESS_MASK PPC_BITMASK(14, 48)
78 #define PHB_IVT_LENGTH_MASK PPC_BITMASK(52, 63)
81 #define PHB_RBA_BASE_ADDRESS PPC_BITMASK(14, 55)
89 #define PHB_RTT_BASE_ADDRESS_MASK PPC_BITMASK(14, 46)
92 #define PHB_PELTV_BASE_ADDRESS PPC_BITMASK(14, 50)
98 #define PHB_PEST_BASE_ADDRESS PPC_BITMASK(14, 51)
106 #define PHB_RTC_INVALIDATE_RID PPC_BITMASK(16, 31)
112 #define PHB_IODA_AD_TSEL PPC_BITMASK(11, 15)
113 #define PHB_IODA_AD_TADR PPC_BITMASK(55, 63)
117 #define PHB_FFI_REQUEST_ISN PPC_BITMASK(49, 59)
127 #define PHB_IVC_INVALIDATE_SID PPC_BITMASK(16, 31)
135 #define PHB_IVC_UPDATE_GEN_MATCH PPC_BITMASK(6, 7)
136 #define PHB_IVC_UPDATE_SERVER PPC_BITMASK(8, 23)
137 #define PHB_IVC_UPDATE_PRI PPC_BITMASK(24, 31)
138 #define PHB_IVC_UPDATE_GEN PPC_BITMASK(32, 33)
139 #define PHB_IVC_UPDATE_P PPC_BITMASK(34, 34)
140 #define PHB_IVC_UPDATE_Q PPC_BITMASK(35, 35)
141 #define PHB_IVC_UPDATE_SID PPC_BITMASK(48, 63)
151 #define PHB_PAPR_ERR_INJ_ADDR_MMIO PPC_BITMASK(16, 63)
153 #define PHB_PAPR_ERR_INJ_MASK_CFG PPC_BITMASK(4, 11)
154 #define PHB_PAPR_ERR_INJ_MASK_MMIO PPC_BITMASK(16, 63)
350 #define IODA2_LXIVT_SERVER PPC_BITMASK(8, 23)
351 #define IODA2_LXIVT_PRIORITY PPC_BITMASK(24, 31)
352 #define IODA2_LXIVT_NODE_ID PPC_BITMASK(56, 63)
355 #define IODA2_IVT_SERVER PPC_BITMASK(0, 23)
356 #define IODA2_IVT_PRIORITY PPC_BITMASK(24, 31)
357 #define IODA2_IVT_GEN PPC_BITMASK(37, 38)
358 #define IODA2_IVT_P PPC_BITMASK(39, 39)
359 #define IODA2_IVT_Q PPC_BITMASK(47, 47)
360 #define IODA2_IVT_PE PPC_BITMASK(48, 63)
363 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0, 47)
364 #define IODA2_TVT_NUM_LEVELS PPC_BITMASK(48, 50)
370 #define IODA2_TVT_TCE_TABLE_SIZE PPC_BITMASK(51, 55)
371 #define IODA2_TVT_IO_PSIZE PPC_BITMASK(59, 63)
380 #define IODA2_M32DT_PE PPC_BITMASK(8, 15)
385 #define IODA2_M64BT_BASE PPC_BITMASK(2, 31)
386 #define IODA2_M64BT_MASK PPC_BITMASK(34, 63)
387 #define IODA2_M64BT_SINGLE_BASE PPC_BITMASK(2, 26)
388 #define IODA2_M64BT_PE_HI PPC_BITMASK(27, 31)
389 #define IODA2_M64BT_SINGLE_MASK PPC_BITMASK(34, 58)
390 #define IODA2_M64BT_PE_LOW PPC_BITMASK(59, 63)
405 #define IODA2_PEST0_TTYPE PPC_BITMASK(5, 7)
427 #define IODA2_PEST0_LEM_BIT PPC_BITMASK(26, 31)
428 #define IODA2_PEST0_RID PPC_BITMASK(32, 47)
429 #define IODA2_PEST0_MSI_DATA PPC_BITMASK(48, 63)
431 #define IODA2_PEST1_FAIL_ADDR PPC_BITMASK(3, 63)