Lines Matching full:bit

42 #define RX_DESC_RDES0_OWN BIT(31)
44 #define RX_DESC_RDES0_DEST_ADDR_FILT_FAIL BIT(30)
50 #define RX_DESC_RDES0_ERR_SUMM_MASK BIT(15)
52 #define RX_DESC_RDES0_DESC_ERR_MASK BIT(14)
54 #define RX_DESC_RDES0_SRC_ADDR_FILT_FAIL_MASK BIT(13)
56 #define RX_DESC_RDES0_LEN_ERR_MASK BIT(12)
58 #define RX_DESC_RDES0_OVRFLW_ERR_MASK BIT(11)
60 #define RX_DESC_RDES0_VLAN_TAG_MASK BIT(10)
62 #define RX_DESC_RDES0_FIRST_DESC_MASK BIT(9)
64 #define RX_DESC_RDES0_LAST_DESC_MASK BIT(8)
66 #define RX_DESC_RDES0_IPC_CHKSM_ERR_GNT_FRM_MASK BIT(7)
68 #define RX_DESC_RDES0_LT_COLL_MASK BIT(6)
70 #define RX_DESC_RDES0_FRM_TYPE_MASK BIT(5)
72 #define RX_DESC_RDES0_REC_WTCHDG_TMT_MASK BIT(4)
74 #define RX_DESC_RDES0_RCV_ERR_MASK BIT(3)
75 /* Dribble Bit Error */
76 #define RX_DESC_RDES0_DRBL_BIT_ERR_MASK BIT(2)
78 #define RX_DESC_RDES0_CRC_ERR_MASK BIT(1)
80 #define RC_DESC_RDES0_RCE_MASK BIT(0)
83 #define RX_DESC_RDES1_DIS_INTR_COMP_MASK BIT(31)
85 #define RX_DESC_RDES1_RC_END_RING_MASK BIT(25)
87 #define RX_DESC_RDES1_SEC_ADDR_CHND_MASK BIT(24)
106 #define TX_DESC_TDES0_OWN BIT(31)
108 #define TX_DESC_TDES0_TTSS_MASK BIT(17)
110 #define TX_DESC_TDES0_IP_HEAD_ERR_MASK BIT(16)
112 #define TX_DESC_TDES0_ERR_SUMM_MASK BIT(15)
114 #define TX_DESC_TDES0_JBBR_TMT_MASK BIT(14)
116 #define TX_DESC_TDES0_FRM_FLSHD_MASK BIT(13)
118 #define TX_DESC_TDES0_PYLD_CHKSM_ERR_MASK BIT(12)
120 #define TX_DESC_TDES0_LSS_CARR_MASK BIT(11)
122 #define TX_DESC_TDES0_NO_CARR_MASK BIT(10)
124 #define TX_DESC_TDES0_LATE_COLL_MASK BIT(9)
126 #define TX_DESC_TDES0_EXCS_COLL_MASK BIT(8)
128 #define TX_DESC_TDES0_VLAN_FRM_MASK BIT(7)
132 #define TX_DESC_TDES0_EXCS_DEF_MASK BIT(2)
134 #define TX_DESC_TDES0_UNDRFLW_ERR_MASK BIT(1)
135 /* Deferred Bit */
136 #define TX_DESC_TDES0_DFRD_BIT_MASK BIT(0)
139 #define TX_DESC_TDES1_INTERR_COMP_MASK BIT(31)
141 #define TX_DESC_TDES1_LAST_SEG_MASK BIT(30)
143 #define TX_DESC_TDES1_FIRST_SEG_MASK BIT(29)
147 #define TX_DESC_TDES1_DIS_CDC_MASK BIT(26)
149 #define TX_DESC_TDES1_TX_END_RING_MASK BIT(25)
151 #define TX_DESC_TDES1_SEC_ADDR_CHND_MASK BIT(24)
211 #define NPCM_DMA_STATUS_ERI BIT(14)
213 #define NPCM_DMA_STATUS_FBI BIT(13)
215 #define NPCM_DMA_STATUS_ETI BIT(10)
217 #define NPCM_DMA_STATUS_RWT BIT(9)
219 #define NPCM_DMA_STATUS_RPS BIT(8)
221 #define NPCM_DMA_STATUS_RU BIT(7)
223 #define NPCM_DMA_STATUS_RI BIT(6)
225 #define NPCM_DMA_STATUS_UNF BIT(5)
227 #define NPCM_DMA_STATUS_OVF BIT(4)
229 #define NPCM_DMA_STATUS_TJT BIT(3)
231 #define NPCM_DMA_STATUS_TU BIT(2)
233 #define NPCM_DMA_STATUS_TPS BIT(1)
235 #define NPCM_DMA_STATUS_TI BIT(0)
238 #define NPCM_DMA_STATUS_NIS BIT(16)
245 #define NPCM_DMA_STATUS_AIS BIT(15)
258 #define NPCM_DMA_INTR_ENAB_ERE BIT(14)
260 #define NPCM_DMA_INTR_ENAB_FBE BIT(13)
262 #define NPCM_DMA_INTR_ENAB_ETE BIT(10)
264 #define NPCM_DMA_INTR_ENAB_RWE BIT(9)
266 #define NPCM_DMA_INTR_ENAB_RSE BIT(8)
268 #define NPCM_DMA_INTR_ENAB_RUE BIT(7)
270 #define NPCM_DMA_INTR_ENAB_RIE BIT(6)
272 #define NPCM_DMA_INTR_ENAB_UNE BIT(5)
274 #define NPCM_DMA_INTR_ENAB_OVE BIT(4)
276 #define NPCM_DMA_INTR_ENAB_TJE BIT(3)
278 #define NPCM_DMA_INTR_ENAB_TUE BIT(2)
280 #define NPCM_DMA_INTR_ENAB_TSE BIT(1)
282 #define NPCM_DMA_INTR_ENAB_TIE BIT(0)
285 #define NPCM_DMA_INTR_ENAB_NIE BIT(16)
292 #define NPCM_DMA_INTR_ENAB_AIE BIT(15)
305 #define NPCM_DMA_CONTROL_FLUSH_MASK BIT(24)
307 #define NPCM_DMA_CONTROL_START_STOP_TX BIT(13)
309 #define NPCM_DMA_CONTROL_START_STOP_RX BIT(1)
316 #define NPCM_GMAC_MAC_CONFIG_RX_EN BIT(2)
318 #define NPCM_GMAC_MAC_CONFIG_TX_EN BIT(3)
321 #define NPCM_GMAC_FRAME_FILTER_REC_ALL_MASK BIT(31)
323 #define NPCM_GMAC_FRAME_FILTER_HPF_MASK BIT(10)
325 #define NPCM_GMAC_FRAME_FILTER_SAF_MASK BIT(9)
327 #define NPCM_GMAC_FRAME_FILTER_SAIF_MASK BIT(8)
329 #define NPCM_GMAC_FRAME_FILTER_PCF_MASK BIT(word) extract32((word), 6, 2)
331 #define NPCM_GMAC_FRAME_FILTER_DBF_MASK BIT(5)
333 #define NPCM_GMAC_FRAME_FILTER_PM_MASK BIT(4)
335 #define NPCM_GMAC_FRAME_FILTER_DAIF_MASK BIT(3)
337 #define NPCM_GMAC_FRAME_FILTER_HMC_MASK BIT(2)
339 #define NPCM_GMAC_FRAME_FILTER_HUC_MASK BIT(1)
341 #define NPCM_GMAC_FRAME_FILTER_PR_MASK BIT(0)