Lines Matching +full:shared +full:- +full:interrupt

33 #define MSK(n)              ((1ULL << (n)) - 1)
45 /* Register Map for Shared Section */
49 /* Shared Global Counter */
57 /* Reset Mask - Disables Interrupt */
61 /* Set Mask (WO) - Enables Interrupt */
65 /* Global Interrupt Mask Register (RO) - Bit Set == Interrupt enabled */
101 /* User-Mode Visible Section Register */
102 /* Read-only alias for GIC Shared CounterLo */
104 /* Read-only alias for GIC Shared CounterHi */
160 #define GIC_CPU_INT_MAX             5 /* Core Interrupt 7 */
166 #define GIC_LOCAL_INT_SWINT1    5 /* CPU software interrupt 1 */
167 #define GIC_LOCAL_INT_SWINT0    4 /* CPU software interrupt 0 */
169 #define GIC_LOCAL_INT_TIMER     2 /* CPU timer interrupt */
173 #define TYPE_MIPS_GIC "mips-gic"
204     /* Shared Section Registers */