Lines Matching defs:GICState

65 struct GICState {  struct
67     SysBusDevice parent_obj;
70     qemu_irq parent_irq[GIC_NCPU];
71     qemu_irq parent_fiq[GIC_NCPU];
72     qemu_irq parent_virq[GIC_NCPU];
73     qemu_irq parent_vfiq[GIC_NCPU];
74     qemu_irq parent_nmi[GIC_NCPU];
75     qemu_irq parent_vnmi[GIC_NCPU];
76     qemu_irq maintenance_irq[GIC_NCPU];
81     uint32_t ctlr;
85     uint32_t cpu_ctlr[GIC_NCPU_VCPU];
87     gic_irq_state irq_state[GIC_MAXIRQ];
88     uint8_t irq_target[GIC_MAXIRQ];
89     uint8_t priority1[GIC_INTERNAL][GIC_NCPU];
90     uint8_t priority2[GIC_MAXIRQ - GIC_INTERNAL];
97     uint8_t sgi_pending[GIC_NR_SGIS][GIC_NCPU];
99     uint16_t priority_mask[GIC_NCPU_VCPU];
100     uint16_t running_priority[GIC_NCPU_VCPU];
101     uint16_t current_pending[GIC_NCPU_VCPU];
102     uint32_t n_prio_bits;
110     uint8_t  bpr[GIC_NCPU_VCPU];
111     uint8_t  abpr[GIC_NCPU_VCPU];
137     struct GICState *backref[GIC_NCPU];  argument
150 typedef struct GICState GICState;  argument