Lines Matching defs:FslIMX7State

66 struct FslIMX7State {  struct
68     DeviceState    parent_obj;
71     ARMCPU             cpu[FSL_IMX7_NUM_CPUS];
72     A15MPPrivState     a7mpcore;
73     IMXGPTState        gpt[FSL_IMX7_NUM_GPTS];
74     IMXGPIOState       gpio[FSL_IMX7_NUM_GPIOS];
75     IMX7CCMState       ccm;
76     IMX7AnalogState    analog;
77     IMX7SNVSState      snvs;
78     IMX7SRCState       src;
79     IMXGPCv2State      gpcv2;
80     IMXSPIState        spi[FSL_IMX7_NUM_ECSPIS];
81     IMXI2CState        i2c[FSL_IMX7_NUM_I2CS];
82     IMXSerialState     uart[FSL_IMX7_NUM_UARTS];
83     IMXFECState        eth[FSL_IMX7_NUM_ETHS];
84     SDHCIState         usdhc[FSL_IMX7_NUM_USDHCS];
85     IMX2WdtState       wdt[FSL_IMX7_NUM_WDTS];
86     IMX7GPRState       gpr;
87     ChipideaState      usb[FSL_IMX7_NUM_USBS];
88     DesignwarePCIEHost pcie;
89     OrIRQState         pcie4_msi_irq;
90     MemoryRegion       rom;
91     MemoryRegion       caam;
92     MemoryRegion       ocram;
93     MemoryRegion       ocram_epdc;
94     MemoryRegion       ocram_pxp;
95     MemoryRegion       ocram_s;
97     uint32_t           phy_num[FSL_IMX7_NUM_ETHS];
98     bool               phy_connected[FSL_IMX7_NUM_ETHS];