Lines Matching +full:imx25 +full:- +full:uart

4  * Copyright (C) 2015 Jean-Christophe Dubois <jcd@tribudubois.net>
36 #define TYPE_FSL_IMX25 "fsl-imx25"
55     IMXSerialState uart[FSL_IMX25_NUM_UARTS];  member
89  * 0x43F8_0000 0x43F8_3FFF 16 Kbytes    I2C-1
90  * 0x43F8_4000 0x43F8_7FFF 16 Kbytes    I2C-3
91  * 0x43F8_8000 0x43F8_BFFF 16 Kbytes    CAN-1
92  * 0x43F8_C000 0x43F8_FFFF 16 Kbytes    CAN-2
93  * 0x43F9_0000 0x43F9_3FFF 16 Kbytes    UART-1
94  * 0x43F9_4000 0x43F9_7FFF 16 Kbytes    UART-2
95  * 0x43F9_8000 0x43F9_BFFF 16 Kbytes    I2C-2
96  * 0x43F9_C000 0x43F9_FFFF 16 Kbytes    1-Wire
98  * 0x43FA_4000 0x43FA_7FFF 16 Kbytes    CSPI-1
105  * 0x43FC_0000 0x43FF_FFFF 256 Kbytes   Reserved AIPS A off-platform slots
108  * 0x5000_4000 0x5000_7FFF 16 Kbytes    CSPI-3
109  * 0x5000_8000 0x5000_BFFF 16 Kbytes    UART-4
110  * 0x5000_C000 0x5000_FFFF 16 Kbytes    UART-3
111  * 0x5001_0000 0x5001_3FFF 16 Kbytes    CSPI-2
112  * 0x5001_4000 0x5001_7FFF 16 Kbytes    SSI-2
115  * 0x5002_4000 0x5002_7FFF 16 Kbytes    SIM-1
116  * 0x5002_8000 0x5002_BFFF 16 Kbytes    SIM-2
117  * 0x5002_C000 0x5002_FFFF 16 Kbytes    UART-5
119  * 0x5003_4000 0x5003_7FFF 16 Kbytes    SSI-1
127  * 0x53F8_4000 0x53F8_7FFF 16 Kbytes    GPT-4
128  * 0x53F8_8000 0x53F8_BFFF 16 Kbytes    GPT-3
129  * 0x53F8_C000 0x53F8_FFFF 16 Kbytes    GPT-2
130  * 0x53F9_0000 0x53F9_3FFF 16 Kbytes    GPT-1
131  * 0x53F9_4000 0x53F9_7FFF 16 Kbytes    EPIT-1
132  * 0x53F9_8000 0x53F9_BFFF 16 Kbytes    EPIT-2
133  * 0x53F9_C000 0x53F9_FFFF 16 Kbytes    GPIO-4
134  * 0x53FA_0000 0x53FA_3FFF 16 Kbytes    PWM-2
135  * 0x53FA_4000 0x53FA_7FFF 16 Kbytes    GPIO-3
136  * 0x53FA_8000 0x53FA_BFFF 16 Kbytes    PWM-3
139  * 0x53FB_4000 0x53FB_7FFF 16 Kbytes    eSDHC-1
140  * 0x53FB_8000 0x53FB_BFFF 16 Kbytes    eSDHC-2
144  * 0x53FC_8000 0x53FC_BFFF 16 Kbytes    PWM-4
145  * 0x53FC_C000 0x53FC_FFFF 16 Kbytes    GPIO-1
146  * 0x53FD_0000 0x53FD_3FFF 16 Kbytes    GPIO-2
150  * 0x53FE_0000 0x53FE_3FFF 16 Kbytes    PWM-1