Lines Matching +full:armv7m +full:- +full:systick

2  * ARMv7M CPU object
20 #define TYPE_BITBAND "ARM-bitband-memory"
34 #define TYPE_ARMV7M "armv7m"
35 OBJECT_DECLARE_SIMPLE_TYPE(ARMv7MState, ARMV7M)
39 /* ARMv7M container object.
44  * + Property "cpu-type": CPU type to instantiate
45  * + Property "num-irq": number of external IRQ lines
46  * + Property "num-prio-bits": number of priority bits in the NVIC
48  *   that CPU accesses see. (The NVIC, bitbanding and other CPU-internal
51  * + Property "init-svtor": secure VTOR reset value (forwarded to CPU object)
52  * + Property "init-nsvtor": non-secure VTOR reset value (forwarded to CPU object)
55  * + Property "enable-bitband": expose bitbanded IO
56  * + Property "mpu-ns-regions": number of Non-Secure MPU regions (forwarded
57  *   to CPU object pmsav7-dregion property; default is whatever the default
59  * + Property "mpu-s-regions": number of Secure MPU regions (default is
61  *   value as mpu-ns-regions if the CPU implements the Security Extension)
62  * + Clock input "refclk" is the external reference clock for the systick timers
73     SysTickState systick[M_REG_NUM_BANKS];  member
81      * NS systick device depending on the transaction attributes
85      * MemoryRegion which enforces the S/NS handling of the systick
87      * NS systick device if appropriate.