150 struct ARMSSE {  struct
152     SysBusDevice parent_obj;
155     ARMv7MState armv7m[SSE_MAX_CPUS];
156     CPUClusterState cluster[SSE_MAX_CPUS];
180     ARMSSEMHU mhu[2];  argument
185     ARMSSECPUID cpuid[SSE_MAX_CPUS];  argument
187     ARMSSECPUPwrCtrl cpu_pwrctrl[SSE_MAX_CPUS];  argument
197     MemoryRegion container;
198     MemoryRegion container_alias[SSE_MAX_CPUS - 1];
199     MemoryRegion cpu_container[SSE_MAX_CPUS];
200     MemoryRegion alias1;
201     MemoryRegion alias2;
202     MemoryRegion alias3[SSE_MAX_CPUS];
203     MemoryRegion sram[MAX_SRAM_BANKS];
204     MemoryRegion itcm;
205     MemoryRegion dtcm;
207     qemu_irq *exp_irqs[SSE_MAX_CPUS];
208     qemu_irq ppc0_irq;
209     qemu_irq ppc1_irq;
233 typedef struct ARMSSEInfo ARMSSEInfo;  argument