Lines Matching full:cache

27 static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
30     assert(addr < cache->len && 2 <= cache->len - addr);
31     fuzz_dma_read_cb(cache->xlat + addr, 2, cache->mrs.mr);
32     if (likely(cache->ptr)) {
33         return LD_P(uw)(cache->ptr + addr);
35         return ADDRESS_SPACE_LD_CACHED_SLOW(uw)(cache, addr, attrs, result);
39 static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache,
42     assert(addr < cache->len && 4 <= cache->len - addr);
43     fuzz_dma_read_cb(cache->xlat + addr, 4, cache->mrs.mr);
44     if (likely(cache->ptr)) {
45         return LD_P(l)(cache->ptr + addr);
47         return ADDRESS_SPACE_LD_CACHED_SLOW(l)(cache, addr, attrs, result);
51 static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache,
54     assert(addr < cache->len && 8 <= cache->len - addr);
55     fuzz_dma_read_cb(cache->xlat + addr, 8, cache->mrs.mr);
56     if (likely(cache->ptr)) {
57         return LD_P(q)(cache->ptr + addr);
59         return ADDRESS_SPACE_LD_CACHED_SLOW(q)(cache, addr, attrs, result);
74 static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
77     assert(addr < cache->len && 2 <= cache->len - addr);
78     if (likely(cache->ptr)) {
79         ST_P(w)(cache->ptr + addr, val);
81         ADDRESS_SPACE_ST_CACHED_SLOW(w)(cache, addr, val, attrs, result);
85 static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache,
88     assert(addr < cache->len && 4 <= cache->len - addr);
89     if (likely(cache->ptr)) {
90         ST_P(l)(cache->ptr + addr, val);
92         ADDRESS_SPACE_ST_CACHED_SLOW(l)(cache, addr, val, attrs, result);
96 static inline void ADDRESS_SPACE_ST_CACHED(q)(MemoryRegionCache *cache,
99     assert(addr < cache->len && 8 <= cache->len - addr);
100     if (likely(cache->ptr)) {
101         ST_P(q)(cache->ptr + addr, val);
103         ADDRESS_SPACE_ST_CACHED_SLOW(q)(cache, addr, val, attrs, result);