accel/tcg/cpu-ops.h

22 struct TCGCPUOps {  struct
30     bool mttcg_supported;
37     bool precise_smc;
43     TCGBar guest_default_memory_order;
50     void (*initialize)(void);
62     void (*translate_code)(CPUState *cpu, TranslationBlock *tb,
69     TCGTBCPUState (*get_tb_cpu_state)(CPUState *cs);
81     void (*synchronize_from_tb)(CPUState *cpu, const TranslationBlock *tb);
90     void (*restore_state_to_opc)(CPUState *cpu, const TranslationBlock *tb,
94     void (*cpu_exec_enter)(CPUState *cpu);
96     void (*cpu_exec_exit)(CPUState *cpu);
98     void (*debug_excp_handler)(CPUState *cpu);
101     int (*mmu_index)(CPUState *cpu, bool ifetch);
110     void (*fake_user_interrupt)(CPUState *cpu);
134     void (*record_sigsegv)(CPUState *cpu, vaddr addr,
158     void (*record_sigbus)(CPUState *cpu, vaddr addr,
166     vaddr (*untagged_addr)(CPUState *cs, vaddr addr);
169     void (*do_interrupt)(CPUState *cpu);
171     bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
173     void (*cpu_exec_reset)(CPUState *cpu);
189     bool (*cpu_exec_halt)(CPUState *cpu);
212     bool (*tlb_fill_align)(CPUState *cpu, CPUTLBEntryFull *out, vaddr addr,
222     bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
231     vaddr (*pointer_wrap)(CPUState *cpu, int mmu_idx, vaddr result, vaddr base);
236     void (*do_transaction_failed)(CPUState *cpu, hwaddr physaddr, vaddr addr,
244     G_NORETURN void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
251     vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len);
258     bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp);
264     bool (*debug_check_breakpoint)(CPUState *cpu);
274     bool (*io_recompile_replay_branch)(CPUState *cpu,
280     bool (*need_replay_interrupt)(int interrupt_request);