Lines Matching full:vdev
50 bool vfio_opt_rom_in_denylist(VFIOPCIDevice *vdev) in vfio_opt_rom_in_denylist() argument
55 if (vfio_pci_is(vdev, rom_denylist[i].vendor, rom_denylist[i].device)) { in vfio_opt_rom_in_denylist()
56 trace_vfio_quirk_rom_in_denylist(vdev->vbasedev.name, in vfio_opt_rom_in_denylist()
86 struct VFIOPCIDevice *vdev; member
108 VFIOPCIDevice *vdev = window->vdev; in vfio_generic_window_quirk_address_read() local
110 return vfio_region_read(&vdev->bars[window->bar].region, in vfio_generic_window_quirk_address_read()
119 VFIOPCIDevice *vdev = window->vdev; in vfio_generic_window_quirk_address_write() local
124 vfio_region_write(&vdev->bars[window->bar].region, in vfio_generic_window_quirk_address_write()
131 trace_vfio_quirk_generic_window_address_write(vdev->vbasedev.name, in vfio_generic_window_quirk_address_write()
148 VFIOPCIDevice *vdev = window->vdev; in vfio_generic_window_quirk_data_read() local
152 data = vfio_region_read(&vdev->bars[window->bar].region, in vfio_generic_window_quirk_data_read()
156 data = vfio_pci_read_config(&vdev->pdev, window->address_val, size); in vfio_generic_window_quirk_data_read()
157 trace_vfio_quirk_generic_window_data_read(vdev->vbasedev.name, in vfio_generic_window_quirk_data_read()
168 VFIOPCIDevice *vdev = window->vdev; in vfio_generic_window_quirk_data_write() local
171 vfio_pci_write_config(&vdev->pdev, window->address_val, data, size); in vfio_generic_window_quirk_data_write()
172 trace_vfio_quirk_generic_window_data_write(vdev->vbasedev.name, in vfio_generic_window_quirk_data_write()
177 vfio_region_write(&vdev->bars[window->bar].region, in vfio_generic_window_quirk_data_write()
194 struct VFIOPCIDevice *vdev; member
205 VFIOPCIDevice *vdev = mirror->vdev; in vfio_generic_quirk_mirror_read() local
209 (void)vfio_region_read(&vdev->bars[mirror->bar].region, in vfio_generic_quirk_mirror_read()
212 data = vfio_pci_read_config(&vdev->pdev, addr, size); in vfio_generic_quirk_mirror_read()
213 trace_vfio_quirk_generic_mirror_read(vdev->vbasedev.name, in vfio_generic_quirk_mirror_read()
223 VFIOPCIDevice *vdev = mirror->vdev; in vfio_generic_quirk_mirror_write() local
225 vfio_pci_write_config(&vdev->pdev, addr, data, size); in vfio_generic_quirk_mirror_write()
226 trace_vfio_quirk_generic_mirror_write(vdev->vbasedev.name, in vfio_generic_quirk_mirror_write()
258 VFIOPCIDevice *vdev = opaque; in vfio_ati_3c3_quirk_read() local
259 uint64_t data = vfio_pci_read_config(&vdev->pdev, in vfio_ati_3c3_quirk_read()
262 trace_vfio_quirk_ati_3c3_read(vdev->vbasedev.name, data); in vfio_ati_3c3_quirk_read()
289 static void vfio_ioeventfd_exit(VFIOPCIDevice *vdev, VFIOIOEventFD *ioeventfd) in vfio_ioeventfd_exit() argument
305 if (ioctl(vdev->vbasedev.fd, VFIO_DEVICE_IOEVENTFD, &vfio_ioeventfd)) { in vfio_ioeventfd_exit()
323 static void vfio_drop_dynamic_eventfds(VFIOPCIDevice *vdev, VFIOQuirk *quirk) in vfio_drop_dynamic_eventfds() argument
329 vfio_ioeventfd_exit(vdev, ioeventfd); in vfio_drop_dynamic_eventfds()
347 static VFIOIOEventFD *vfio_ioeventfd_init(VFIOPCIDevice *vdev, in vfio_ioeventfd_init() argument
355 if (vdev->no_kvm_ioeventfd) { in vfio_ioeventfd_init()
382 if (!vdev->no_vfio_ioeventfd) { in vfio_ioeventfd_init()
392 ioeventfd->vfio = !ioctl(vdev->vbasedev.fd, in vfio_ioeventfd_init()
409 static void vfio_vga_probe_ati_3c3_quirk(VFIOPCIDevice *vdev) in vfio_vga_probe_ati_3c3_quirk() argument
417 if (!vfio_pci_is(vdev, PCI_VENDOR_ID_ATI, PCI_ANY_ID) || in vfio_vga_probe_ati_3c3_quirk()
418 !vdev->bars[4].ioport || vdev->bars[4].region.size < 256) { in vfio_vga_probe_ati_3c3_quirk()
424 memory_region_init_io(quirk->mem, OBJECT(vdev), &vfio_ati_3c3_quirk, vdev, in vfio_vga_probe_ati_3c3_quirk()
426 memory_region_add_subregion(&vdev->vga->region[QEMU_PCI_VGA_IO_HI].mem, in vfio_vga_probe_ati_3c3_quirk()
429 QLIST_INSERT_HEAD(&vdev->vga->region[QEMU_PCI_VGA_IO_HI].quirks, in vfio_vga_probe_ati_3c3_quirk()
432 trace_vfio_quirk_ati_3c3_probe(vdev->vbasedev.name); in vfio_vga_probe_ati_3c3_quirk()
444 static void vfio_probe_ati_bar4_quirk(VFIOPCIDevice *vdev, int nr) in vfio_probe_ati_bar4_quirk() argument
450 if (!vfio_pci_is(vdev, PCI_VENDOR_ID_ATI, PCI_ANY_ID) || in vfio_probe_ati_bar4_quirk()
451 !vdev->vga || nr != 4) { in vfio_probe_ati_bar4_quirk()
458 window->vdev = vdev; in vfio_probe_ati_bar4_quirk()
463 window->matches[0].mask = vdev->config_size - 1; in vfio_probe_ati_bar4_quirk()
468 memory_region_init_io(window->addr_mem, OBJECT(vdev), in vfio_probe_ati_bar4_quirk()
471 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_ati_bar4_quirk()
475 memory_region_init_io(window->data_mem, OBJECT(vdev), in vfio_probe_ati_bar4_quirk()
478 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_ati_bar4_quirk()
482 QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); in vfio_probe_ati_bar4_quirk()
484 trace_vfio_quirk_ati_bar4_probe(vdev->vbasedev.name); in vfio_probe_ati_bar4_quirk()
490 static void vfio_probe_ati_bar2_quirk(VFIOPCIDevice *vdev, int nr) in vfio_probe_ati_bar2_quirk() argument
496 if (!vfio_pci_is(vdev, PCI_VENDOR_ID_ATI, PCI_ANY_ID) || in vfio_probe_ati_bar2_quirk()
497 !vdev->vga || nr != 2 || !vdev->bars[2].mem64) { in vfio_probe_ati_bar2_quirk()
504 mirror->vdev = vdev; in vfio_probe_ati_bar2_quirk()
508 memory_region_init_io(mirror->mem, OBJECT(vdev), in vfio_probe_ati_bar2_quirk()
511 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_ati_bar2_quirk()
514 QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); in vfio_probe_ati_bar2_quirk()
516 trace_vfio_quirk_ati_bar2_probe(vdev->vbasedev.name); in vfio_probe_ati_bar2_quirk()
546 VFIOPCIDevice *vdev; member
555 VFIOPCIDevice *vdev = quirk->vdev; in vfio_nvidia_3d4_quirk_read() local
559 return vfio_vga_read(&vdev->vga->region[QEMU_PCI_VGA_IO_HI], in vfio_nvidia_3d4_quirk_read()
567 VFIOPCIDevice *vdev = quirk->vdev; in vfio_nvidia_3d4_quirk_write() local
576 trace_vfio_quirk_nvidia_3d0_state(vdev->vbasedev.name, in vfio_nvidia_3d4_quirk_write()
583 trace_vfio_quirk_nvidia_3d0_state(vdev->vbasedev.name, in vfio_nvidia_3d4_quirk_write()
590 trace_vfio_quirk_nvidia_3d0_state(vdev->vbasedev.name, in vfio_nvidia_3d4_quirk_write()
596 vfio_vga_write(&vdev->vga->region[QEMU_PCI_VGA_IO_HI], in vfio_nvidia_3d4_quirk_write()
610 VFIOPCIDevice *vdev = quirk->vdev; in vfio_nvidia_3d0_quirk_read() local
612 uint64_t data = vfio_vga_read(&vdev->vga->region[QEMU_PCI_VGA_IO_HI], in vfio_nvidia_3d0_quirk_read()
621 data = vfio_pci_read_config(&vdev->pdev, offset, size); in vfio_nvidia_3d0_quirk_read()
622 trace_vfio_quirk_nvidia_3d0_read(vdev->vbasedev.name, in vfio_nvidia_3d0_quirk_read()
633 VFIOPCIDevice *vdev = quirk->vdev; in vfio_nvidia_3d0_quirk_write() local
641 trace_vfio_quirk_nvidia_3d0_state(vdev->vbasedev.name, in vfio_nvidia_3d0_quirk_write()
647 vfio_pci_write_config(&vdev->pdev, offset, data, size); in vfio_nvidia_3d0_quirk_write()
648 trace_vfio_quirk_nvidia_3d0_write(vdev->vbasedev.name, in vfio_nvidia_3d0_quirk_write()
654 vfio_vga_write(&vdev->vga->region[QEMU_PCI_VGA_IO_HI], in vfio_nvidia_3d0_quirk_write()
664 static void vfio_vga_probe_nvidia_3d0_quirk(VFIOPCIDevice *vdev) in vfio_vga_probe_nvidia_3d0_quirk() argument
669 if (vdev->no_geforce_quirks || in vfio_vga_probe_nvidia_3d0_quirk()
670 !vfio_pci_is(vdev, PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID) || in vfio_vga_probe_nvidia_3d0_quirk()
671 !vdev->bars[1].region.size) { in vfio_vga_probe_nvidia_3d0_quirk()
677 data->vdev = vdev; in vfio_vga_probe_nvidia_3d0_quirk()
679 memory_region_init_io(&quirk->mem[0], OBJECT(vdev), &vfio_nvidia_3d4_quirk, in vfio_vga_probe_nvidia_3d0_quirk()
681 memory_region_add_subregion(&vdev->vga->region[QEMU_PCI_VGA_IO_HI].mem, in vfio_vga_probe_nvidia_3d0_quirk()
684 memory_region_init_io(&quirk->mem[1], OBJECT(vdev), &vfio_nvidia_3d0_quirk, in vfio_vga_probe_nvidia_3d0_quirk()
686 memory_region_add_subregion(&vdev->vga->region[QEMU_PCI_VGA_IO_HI].mem, in vfio_vga_probe_nvidia_3d0_quirk()
689 QLIST_INSERT_HEAD(&vdev->vga->region[QEMU_PCI_VGA_IO_HI].quirks, in vfio_vga_probe_nvidia_3d0_quirk()
692 trace_vfio_quirk_nvidia_3d0_probe(vdev->vbasedev.name); in vfio_vga_probe_nvidia_3d0_quirk()
713 VFIOPCIDevice *vdev = bar5->window.vdev; in vfio_nvidia_bar5_enable() local
720 trace_vfio_quirk_nvidia_bar5_state(vdev->vbasedev.name, in vfio_nvidia_bar5_enable()
730 VFIOPCIDevice *vdev = bar5->window.vdev; in vfio_nvidia_bar5_quirk_master_read() local
732 return vfio_region_read(&vdev->bars[5].region, addr, size); in vfio_nvidia_bar5_quirk_master_read()
739 VFIOPCIDevice *vdev = bar5->window.vdev; in vfio_nvidia_bar5_quirk_master_write() local
741 vfio_region_write(&vdev->bars[5].region, addr, data, size); in vfio_nvidia_bar5_quirk_master_write()
757 VFIOPCIDevice *vdev = bar5->window.vdev; in vfio_nvidia_bar5_quirk_enable_read() local
759 return vfio_region_read(&vdev->bars[5].region, addr + 4, size); in vfio_nvidia_bar5_quirk_enable_read()
766 VFIOPCIDevice *vdev = bar5->window.vdev; in vfio_nvidia_bar5_quirk_enable_write() local
768 vfio_region_write(&vdev->bars[5].region, addr + 4, data, size); in vfio_nvidia_bar5_quirk_enable_write()
780 static void vfio_probe_nvidia_bar5_quirk(VFIOPCIDevice *vdev, int nr) in vfio_probe_nvidia_bar5_quirk() argument
786 if (vdev->no_geforce_quirks || in vfio_probe_nvidia_bar5_quirk()
787 !vfio_pci_is(vdev, PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID) || in vfio_probe_nvidia_bar5_quirk()
788 !vdev->vga || nr != 5 || !vdev->bars[5].ioport) { in vfio_probe_nvidia_bar5_quirk()
797 window->vdev = vdev; in vfio_probe_nvidia_bar5_quirk()
804 window->matches[1].mask = vdev->config_size - 1; in vfio_probe_nvidia_bar5_quirk()
809 memory_region_init_io(window->addr_mem, OBJECT(vdev), in vfio_probe_nvidia_bar5_quirk()
812 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_nvidia_bar5_quirk()
817 memory_region_init_io(window->data_mem, OBJECT(vdev), in vfio_probe_nvidia_bar5_quirk()
820 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_nvidia_bar5_quirk()
825 memory_region_init_io(&quirk->mem[2], OBJECT(vdev), in vfio_probe_nvidia_bar5_quirk()
828 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_nvidia_bar5_quirk()
831 memory_region_init_io(&quirk->mem[3], OBJECT(vdev), in vfio_probe_nvidia_bar5_quirk()
834 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_nvidia_bar5_quirk()
837 QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); in vfio_probe_nvidia_bar5_quirk()
839 trace_vfio_quirk_nvidia_bar5_probe(vdev->vbasedev.name); in vfio_probe_nvidia_bar5_quirk()
862 VFIOPCIDevice *vdev = mirror->vdev; in vfio_nvidia_quirk_mirror_write() local
863 PCIDevice *pdev = &vdev->pdev; in vfio_nvidia_quirk_mirror_write()
875 vfio_region_write(&vdev->bars[mirror->bar].region, in vfio_nvidia_quirk_mirror_write()
877 trace_vfio_quirk_nvidia_bar0_msi_ack(vdev->vbasedev.name); in vfio_nvidia_quirk_mirror_write()
895 if (!vdev->no_kvm_ioeventfd && in vfio_nvidia_quirk_mirror_write()
905 ioeventfd = vfio_ioeventfd_init(vdev, mirror->mem, addr, size, in vfio_nvidia_quirk_mirror_write()
906 data, &vdev->bars[mirror->bar].region, in vfio_nvidia_quirk_mirror_write()
918 "size %u", vdev->vbasedev.name, addr, data, size); in vfio_nvidia_quirk_mirror_write()
930 static void vfio_nvidia_bar0_quirk_reset(VFIOPCIDevice *vdev, VFIOQuirk *quirk) in vfio_nvidia_bar0_quirk_reset() argument
937 vfio_drop_dynamic_eventfds(vdev, quirk); in vfio_nvidia_bar0_quirk_reset()
940 static void vfio_probe_nvidia_bar0_quirk(VFIOPCIDevice *vdev, int nr) in vfio_probe_nvidia_bar0_quirk() argument
946 if (vdev->no_geforce_quirks || in vfio_probe_nvidia_bar0_quirk()
947 !vfio_pci_is(vdev, PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID) || in vfio_probe_nvidia_bar0_quirk()
948 !vfio_is_vga(vdev) || nr != 0) { in vfio_probe_nvidia_bar0_quirk()
956 mirror->vdev = vdev; in vfio_probe_nvidia_bar0_quirk()
962 memory_region_init_io(mirror->mem, OBJECT(vdev), in vfio_probe_nvidia_bar0_quirk()
965 vdev->config_size); in vfio_probe_nvidia_bar0_quirk()
966 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_nvidia_bar0_quirk()
969 QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); in vfio_probe_nvidia_bar0_quirk()
972 if (vdev->vga) { in vfio_probe_nvidia_bar0_quirk()
977 mirror->vdev = vdev; in vfio_probe_nvidia_bar0_quirk()
983 memory_region_init_io(mirror->mem, OBJECT(vdev), in vfio_probe_nvidia_bar0_quirk()
987 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_nvidia_bar0_quirk()
990 QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); in vfio_probe_nvidia_bar0_quirk()
993 trace_vfio_quirk_nvidia_bar0_probe(vdev->vbasedev.name); in vfio_probe_nvidia_bar0_quirk()
1027 VFIOPCIDevice *vdev; member
1037 VFIOPCIDevice *vdev = rtl->vdev; in vfio_rtl8168_quirk_address_read() local
1038 uint64_t data = vfio_region_read(&vdev->bars[2].region, addr + 0x74, size); in vfio_rtl8168_quirk_address_read()
1042 trace_vfio_quirk_rtl8168_fake_latch(vdev->vbasedev.name, data); in vfio_rtl8168_quirk_address_read()
1052 VFIOPCIDevice *vdev = rtl->vdev; in vfio_rtl8168_quirk_address_write() local
1061 if (vdev->pdev.cap_present & QEMU_PCI_CAP_MSIX) { in vfio_rtl8168_quirk_address_write()
1065 trace_vfio_quirk_rtl8168_msix_write(vdev->vbasedev.name, in vfio_rtl8168_quirk_address_write()
1069 memory_region_dispatch_write(&vdev->pdev.msix_table_mmio, in vfio_rtl8168_quirk_address_write()
1078 vfio_region_write(&vdev->bars[2].region, addr + 0x74, data, size); in vfio_rtl8168_quirk_address_write()
1096 VFIOPCIDevice *vdev = rtl->vdev; in vfio_rtl8168_quirk_data_read() local
1097 uint64_t data = vfio_region_read(&vdev->bars[2].region, addr + 0x70, size); in vfio_rtl8168_quirk_data_read()
1099 if (rtl->enabled && (vdev->pdev.cap_present & QEMU_PCI_CAP_MSIX)) { in vfio_rtl8168_quirk_data_read()
1101 memory_region_dispatch_read(&vdev->pdev.msix_table_mmio, offset, in vfio_rtl8168_quirk_data_read()
1104 trace_vfio_quirk_rtl8168_msix_read(vdev->vbasedev.name, offset, data); in vfio_rtl8168_quirk_data_read()
1114 VFIOPCIDevice *vdev = rtl->vdev; in vfio_rtl8168_quirk_data_write() local
1118 vfio_region_write(&vdev->bars[2].region, addr + 0x70, data, size); in vfio_rtl8168_quirk_data_write()
1132 static void vfio_probe_rtl8168_bar2_quirk(VFIOPCIDevice *vdev, int nr) in vfio_probe_rtl8168_bar2_quirk() argument
1137 if (!vfio_pci_is(vdev, PCI_VENDOR_ID_REALTEK, 0x8168) || nr != 2) { in vfio_probe_rtl8168_bar2_quirk()
1143 rtl->vdev = vdev; in vfio_probe_rtl8168_bar2_quirk()
1145 memory_region_init_io(&quirk->mem[0], OBJECT(vdev), in vfio_probe_rtl8168_bar2_quirk()
1148 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_rtl8168_bar2_quirk()
1151 memory_region_init_io(&quirk->mem[1], OBJECT(vdev), in vfio_probe_rtl8168_bar2_quirk()
1154 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_rtl8168_bar2_quirk()
1157 QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); in vfio_probe_rtl8168_bar2_quirk()
1159 trace_vfio_quirk_rtl8168_probe(vdev->vbasedev.name); in vfio_probe_rtl8168_bar2_quirk()
1172 bool vfio_pci_igd_opregion_init(VFIOPCIDevice *vdev, in vfio_pci_igd_opregion_init() argument
1177 vdev->igd_opregion = g_malloc0(info->size); in vfio_pci_igd_opregion_init()
1178 ret = pread(vdev->vbasedev.fd, vdev->igd_opregion, in vfio_pci_igd_opregion_init()
1182 g_free(vdev->igd_opregion); in vfio_pci_igd_opregion_init()
1183 vdev->igd_opregion = NULL; in vfio_pci_igd_opregion_init()
1201 vdev->igd_opregion, info->size); in vfio_pci_igd_opregion_init()
1203 trace_vfio_pci_igd_opregion_enabled(vdev->vbasedev.name); in vfio_pci_igd_opregion_init()
1205 pci_set_long(vdev->pdev.config + IGD_ASLS, 0); in vfio_pci_igd_opregion_init()
1206 pci_set_long(vdev->pdev.wmask + IGD_ASLS, ~0); in vfio_pci_igd_opregion_init()
1207 pci_set_long(vdev->emulated_config_bits + IGD_ASLS, ~0); in vfio_pci_igd_opregion_init()
1215 void vfio_vga_quirk_setup(VFIOPCIDevice *vdev) in vfio_vga_quirk_setup() argument
1217 vfio_vga_probe_ati_3c3_quirk(vdev); in vfio_vga_quirk_setup()
1218 vfio_vga_probe_nvidia_3d0_quirk(vdev); in vfio_vga_quirk_setup()
1221 void vfio_vga_quirk_exit(VFIOPCIDevice *vdev) in vfio_vga_quirk_exit() argument
1226 for (i = 0; i < ARRAY_SIZE(vdev->vga->region); i++) { in vfio_vga_quirk_exit()
1227 QLIST_FOREACH(quirk, &vdev->vga->region[i].quirks, next) { in vfio_vga_quirk_exit()
1229 memory_region_del_subregion(&vdev->vga->region[i].mem, in vfio_vga_quirk_exit()
1236 void vfio_vga_quirk_finalize(VFIOPCIDevice *vdev) in vfio_vga_quirk_finalize() argument
1240 for (i = 0; i < ARRAY_SIZE(vdev->vga->region); i++) { in vfio_vga_quirk_finalize()
1241 while (!QLIST_EMPTY(&vdev->vga->region[i].quirks)) { in vfio_vga_quirk_finalize()
1242 VFIOQuirk *quirk = QLIST_FIRST(&vdev->vga->region[i].quirks); in vfio_vga_quirk_finalize()
1254 void vfio_bar_quirk_setup(VFIOPCIDevice *vdev, int nr) in vfio_bar_quirk_setup() argument
1256 vfio_probe_ati_bar4_quirk(vdev, nr); in vfio_bar_quirk_setup()
1257 vfio_probe_ati_bar2_quirk(vdev, nr); in vfio_bar_quirk_setup()
1258 vfio_probe_nvidia_bar5_quirk(vdev, nr); in vfio_bar_quirk_setup()
1259 vfio_probe_nvidia_bar0_quirk(vdev, nr); in vfio_bar_quirk_setup()
1260 vfio_probe_rtl8168_bar2_quirk(vdev, nr); in vfio_bar_quirk_setup()
1262 vfio_probe_igd_bar0_quirk(vdev, nr); in vfio_bar_quirk_setup()
1263 vfio_probe_igd_bar4_quirk(vdev, nr); in vfio_bar_quirk_setup()
1267 void vfio_bar_quirk_exit(VFIOPCIDevice *vdev, int nr) in vfio_bar_quirk_exit() argument
1269 VFIOBAR *bar = &vdev->bars[nr]; in vfio_bar_quirk_exit()
1275 vfio_ioeventfd_exit(vdev, QLIST_FIRST(&quirk->ioeventfds)); in vfio_bar_quirk_exit()
1284 void vfio_bar_quirk_finalize(VFIOPCIDevice *vdev, int nr) in vfio_bar_quirk_finalize() argument
1286 VFIOBAR *bar = &vdev->bars[nr]; in vfio_bar_quirk_finalize()
1304 void vfio_quirk_reset(VFIOPCIDevice *vdev) in vfio_quirk_reset() argument
1310 VFIOBAR *bar = &vdev->bars[i]; in vfio_quirk_reset()
1314 quirk->reset(vdev, quirk); in vfio_quirk_reset()
1341 static bool vfio_radeon_smc_is_running(VFIOPCIDevice *vdev) in vfio_radeon_smc_is_running() argument
1349 vfio_region_write(&vdev->bars[5].region, 0x200, 0x80000004, 4); in vfio_radeon_smc_is_running()
1350 clk = vfio_region_read(&vdev->bars[5].region, 0x204, 4); in vfio_radeon_smc_is_running()
1351 vfio_region_write(&vdev->bars[5].region, 0x200, 0x80000370, 4); in vfio_radeon_smc_is_running()
1352 pc_c = vfio_region_read(&vdev->bars[5].region, 0x204, 4); in vfio_radeon_smc_is_running()
1365 static void vfio_radeon_set_gfx_only_reset(VFIOPCIDevice *vdev) in vfio_radeon_set_gfx_only_reset() argument
1370 vfio_region_write(&vdev->bars[5].region, 0x200, 0xc00c0000, 4); in vfio_radeon_set_gfx_only_reset()
1371 fuse = vfio_region_read(&vdev->bars[5].region, 0x204, 4); in vfio_radeon_set_gfx_only_reset()
1374 vfio_region_write(&vdev->bars[5].region, 0x200, 0xc0000010, 4); in vfio_radeon_set_gfx_only_reset()
1375 misc = vfio_region_read(&vdev->bars[5].region, 0x204, 4); in vfio_radeon_set_gfx_only_reset()
1379 vfio_region_write(&vdev->bars[5].region, 0x204, misc ^ 2, 4); in vfio_radeon_set_gfx_only_reset()
1380 vfio_region_read(&vdev->bars[5].region, 0x204, 4); /* flush */ in vfio_radeon_set_gfx_only_reset()
1384 static int vfio_radeon_reset(VFIOPCIDevice *vdev) in vfio_radeon_reset() argument
1386 PCIDevice *pdev = &vdev->pdev; in vfio_radeon_reset()
1391 if (vdev->vbasedev.reset_works) { in vfio_radeon_reset()
1392 trace_vfio_quirk_ati_bonaire_reset_skipped(vdev->vbasedev.name); in vfio_radeon_reset()
1400 if (!vfio_radeon_smc_is_running(vdev)) { in vfio_radeon_reset()
1402 trace_vfio_quirk_ati_bonaire_reset_no_smc(vdev->vbasedev.name); in vfio_radeon_reset()
1407 vfio_radeon_set_gfx_only_reset(vdev); in vfio_radeon_reset()
1415 if (vfio_region_read(&vdev->bars[5].region, 0x5428, 4) != 0xffffffff) { in vfio_radeon_reset()
1421 trace_vfio_quirk_ati_bonaire_reset_timeout(vdev->vbasedev.name); in vfio_radeon_reset()
1425 vfio_region_write(&vdev->bars[5].region, 0x200, 0x80000000, 4); in vfio_radeon_reset()
1426 data = vfio_region_read(&vdev->bars[5].region, 0x204, 4); in vfio_radeon_reset()
1428 vfio_region_write(&vdev->bars[5].region, 0x204, data, 4); in vfio_radeon_reset()
1431 vfio_region_write(&vdev->bars[5].region, 0x200, 0x80000004, 4); in vfio_radeon_reset()
1432 data = vfio_region_read(&vdev->bars[5].region, 0x204, 4); in vfio_radeon_reset()
1434 vfio_region_write(&vdev->bars[5].region, 0x204, data, 4); in vfio_radeon_reset()
1436 trace_vfio_quirk_ati_bonaire_reset_done(vdev->vbasedev.name); in vfio_radeon_reset()
1445 void vfio_setup_resetfn_quirk(VFIOPCIDevice *vdev) in vfio_setup_resetfn_quirk() argument
1447 switch (vdev->vendor_id) { in vfio_setup_resetfn_quirk()
1449 switch (vdev->device_id) { in vfio_setup_resetfn_quirk()
1470 vdev->resetfn = vfio_radeon_reset; in vfio_setup_resetfn_quirk()
1471 trace_vfio_quirk_ati_bonaire_reset(vdev->vbasedev.name); in vfio_setup_resetfn_quirk()
1540 static bool vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp) in vfio_add_nv_gpudirect_cap() argument
1543 PCIDevice *pdev = &vdev->pdev; in vfio_add_nv_gpudirect_cap()
1548 if (vdev->nv_gpudirect_clique == 0xFF) { in vfio_add_nv_gpudirect_cap()
1552 if (!vfio_pci_is(vdev, PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID)) { in vfio_add_nv_gpudirect_cap()
1572 ret = pread(vdev->vbasedev.fd, &tmp, 1, in vfio_add_nv_gpudirect_cap()
1573 vdev->config_offset + PCI_CAPABILITY_LIST); in vfio_add_nv_gpudirect_cap()
1603 memset(vdev->emulated_config_bits + pos, 0xFF, 8); in vfio_add_nv_gpudirect_cap()
1609 pci_set_byte(pdev->config + pos++, vdev->nv_gpudirect_clique << 3); in vfio_add_nv_gpudirect_cap()
1633 static bool vfio_add_vmd_shadow_cap(VFIOPCIDevice *vdev, Error **errp) in vfio_add_vmd_shadow_cap() argument
1639 if (!(vfio_pci_is(vdev, PCI_VENDOR_ID_INTEL, 0x201D) || in vfio_add_vmd_shadow_cap()
1640 vfio_pci_is(vdev, PCI_VENDOR_ID_INTEL, 0x467F) || in vfio_add_vmd_shadow_cap()
1641 vfio_pci_is(vdev, PCI_VENDOR_ID_INTEL, 0x4C3D) || in vfio_add_vmd_shadow_cap()
1642 vfio_pci_is(vdev, PCI_VENDOR_ID_INTEL, 0x9A0B))) { in vfio_add_vmd_shadow_cap()
1646 ret = pread(vdev->vbasedev.fd, membar_phys, 16, in vfio_add_vmd_shadow_cap()
1647 vdev->config_offset + PCI_BASE_ADDRESS_2); in vfio_add_vmd_shadow_cap()
1650 vdev->vbasedev.name, ret); in vfio_add_vmd_shadow_cap()
1654 ret = pci_add_capability(&vdev->pdev, PCI_CAP_ID_VNDR, pos, in vfio_add_vmd_shadow_cap()
1661 memset(vdev->emulated_config_bits + pos, 0xFF, VMD_SHADOW_CAP_LEN); in vfio_add_vmd_shadow_cap()
1663 pci_set_byte(vdev->pdev.config + pos++, VMD_SHADOW_CAP_LEN); in vfio_add_vmd_shadow_cap()
1664 pci_set_byte(vdev->pdev.config + pos++, VMD_SHADOW_CAP_VER); in vfio_add_vmd_shadow_cap()
1665 pci_set_long(vdev->pdev.config + pos, 0x53484457); /* SHDW */ in vfio_add_vmd_shadow_cap()
1666 memcpy(vdev->pdev.config + pos + 4, membar_phys, 16); in vfio_add_vmd_shadow_cap()
1671 bool vfio_add_virt_caps(VFIOPCIDevice *vdev, Error **errp) in vfio_add_virt_caps() argument
1673 if (!vfio_add_nv_gpudirect_cap(vdev, errp)) { in vfio_add_virt_caps()
1677 if (!vfio_add_vmd_shadow_cap(vdev, errp)) { in vfio_add_virt_caps()