Lines Matching +full:0 +full:x4fc
7 * Raspbian kernel, you must pass the option "dwc_otg.fiq_fsm_enable=0"
17 …* https://sourceforge.net/p/wive-ng/wive-ng-mt/ci/master/tree/docs/DataSheets/RT3050_5x_V2.0_08140…
59 } while (0)
68 int level = 0; in dwc2_update_irq()
103 s->haint &= 0xffff; in dwc2_raise_host_irq()
161 s->frame_number = (s->frame_number + frcnt) & 0xffff; in dwc2_frame_boundary()
190 trace_usb_dwc2_port_disabled(0); in dwc2_find_device()
194 trace_usb_dwc2_device_found(0); in dwc2_find_device()
230 uint32_t chan, epnum, epdir, eptype, mps, pid, pcnt, len, tlen, intr = 0; in dwc2_handle_packet()
231 uint32_t tpcnt, stsidx, actual = 0; in dwc2_handle_packet()
253 if (mps == 0) { in dwc2_handle_packet()
283 usb_packet_setup(&p->packet, pid, ep, 0, hcdma, in dwc2_handle_packet()
354 if (!pcnt || len == 0 || actual == 0) { in dwc2_handle_packet()
415 int hispd = 0; in dwc2_attach()
418 assert(port->index == 0); in dwc2_attach()
469 assert(port->index == 0); in dwc2_detach()
482 assert(port->index == 0); in dwc2_child_detach()
490 assert(port->index == 0); in dwc2_wakeup()
507 assert(port->index == 0); in dwc2_async_packet_complete()
537 uint32_t fr = 0; in dwc2_get_frame_remaining()
541 if (tks < 0) { in dwc2_get_frame_remaining()
542 tks = 0; in dwc2_get_frame_remaining()
596 chan = 0; in dwc2_work_bh()
678 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_glbreg_read()
680 return 0; in dwc2_glbreg_read()
707 int iflg = 0; in dwc2_glbreg_write()
710 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_glbreg_write()
806 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_fszreg_read()
808 return 0; in dwc2_fszreg_read()
826 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_fszreg_write()
852 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_hreg0_read()
854 return 0; in dwc2_hreg0_read()
880 int prst = 0; in dwc2_hreg0_write()
881 int iflg = 0; in dwc2_hreg0_write()
884 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_hreg0_write()
902 val &= 0xffff; in dwc2_hreg0_write()
954 if (iflg > 0) { in dwc2_hreg0_write()
957 } else if (iflg < 0) { in dwc2_hreg0_write()
974 if (addr < HCCHAR(0) || addr > HCDMAB(DWC2_NB_CHAN - 1)) { in dwc2_hreg1_read()
975 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_hreg1_read()
977 return 0; in dwc2_hreg1_read()
993 int iflg = 0; in dwc2_hreg1_write()
994 int enflg = 0; in dwc2_hreg1_write()
995 int disflg = 0; in dwc2_hreg1_write()
997 if (addr < HCCHAR(0) || addr > HCDMAB(DWC2_NB_CHAN - 1)) { in dwc2_hreg1_write()
998 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_hreg1_write()
1006 switch (HSOTG_REG(0x500) + (addr & 0x1c)) { in dwc2_hreg1_write()
1007 case HCCHAR(0): in dwc2_hreg1_write()
1021 case HCINT(0): in dwc2_hreg1_write()
1028 case HCINTMSK(0): in dwc2_hreg1_write()
1032 case HCDMAB(0): in dwc2_hreg1_write()
1070 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_pcgreg_read()
1072 return 0; in dwc2_pcgreg_read()
1090 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_pcgreg_write()
1107 case HSOTG_REG(0x000) ... HSOTG_REG(0x0fc): in dwc2_hsotg_read()
1108 val = dwc2_glbreg_read(ptr, addr, (addr - HSOTG_REG(0x000)) >> 2, size); in dwc2_hsotg_read()
1110 case HSOTG_REG(0x100): in dwc2_hsotg_read()
1111 val = dwc2_fszreg_read(ptr, addr, (addr - HSOTG_REG(0x100)) >> 2, size); in dwc2_hsotg_read()
1113 case HSOTG_REG(0x104) ... HSOTG_REG(0x3fc): in dwc2_hsotg_read()
1114 /* Gadget-mode registers, just return 0 for now */ in dwc2_hsotg_read()
1115 val = 0; in dwc2_hsotg_read()
1117 case HSOTG_REG(0x400) ... HSOTG_REG(0x4fc): in dwc2_hsotg_read()
1118 val = dwc2_hreg0_read(ptr, addr, (addr - HSOTG_REG(0x400)) >> 2, size); in dwc2_hsotg_read()
1120 case HSOTG_REG(0x500) ... HSOTG_REG(0x7fc): in dwc2_hsotg_read()
1121 val = dwc2_hreg1_read(ptr, addr, (addr - HSOTG_REG(0x500)) >> 2, size); in dwc2_hsotg_read()
1123 case HSOTG_REG(0x800) ... HSOTG_REG(0xdfc): in dwc2_hsotg_read()
1124 /* Gadget-mode registers, just return 0 for now */ in dwc2_hsotg_read()
1125 val = 0; in dwc2_hsotg_read()
1127 case HSOTG_REG(0xe00) ... HSOTG_REG(0xffc): in dwc2_hsotg_read()
1128 val = dwc2_pcgreg_read(ptr, addr, (addr - HSOTG_REG(0xe00)) >> 2, size); in dwc2_hsotg_read()
1131 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_hsotg_read()
1133 val = 0; in dwc2_hsotg_read()
1144 case HSOTG_REG(0x000) ... HSOTG_REG(0x0fc): in dwc2_hsotg_write()
1145 dwc2_glbreg_write(ptr, addr, (addr - HSOTG_REG(0x000)) >> 2, val, size); in dwc2_hsotg_write()
1147 case HSOTG_REG(0x100): in dwc2_hsotg_write()
1148 dwc2_fszreg_write(ptr, addr, (addr - HSOTG_REG(0x100)) >> 2, val, size); in dwc2_hsotg_write()
1150 case HSOTG_REG(0x104) ... HSOTG_REG(0x3fc): in dwc2_hsotg_write()
1153 case HSOTG_REG(0x400) ... HSOTG_REG(0x4fc): in dwc2_hsotg_write()
1154 dwc2_hreg0_write(ptr, addr, (addr - HSOTG_REG(0x400)) >> 2, val, size); in dwc2_hsotg_write()
1156 case HSOTG_REG(0x500) ... HSOTG_REG(0x7fc): in dwc2_hsotg_write()
1157 dwc2_hreg1_write(ptr, addr, (addr - HSOTG_REG(0x500)) >> 2, val, size); in dwc2_hsotg_write()
1159 case HSOTG_REG(0x800) ... HSOTG_REG(0xdfc): in dwc2_hsotg_write()
1162 case HSOTG_REG(0xe00) ... HSOTG_REG(0xffc): in dwc2_hsotg_write()
1163 dwc2_pcgreg_write(ptr, addr, (addr - HSOTG_REG(0xe00)) >> 2, val, size); in dwc2_hsotg_write()
1166 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", in dwc2_hsotg_write()
1183 trace_usb_dwc2_hreg2_read(addr, addr >> 12, 0); in dwc2_hreg2_read()
1185 return 0; in dwc2_hreg2_read()
1194 trace_usb_dwc2_hreg2_write(addr, addr >> 12, orig, 0, val); in dwc2_hreg2_write()
1251 s->gotgint = 0; in dwc2_reset_enter()
1252 s->gahbcfg = 0; in dwc2_reset_enter()
1257 s->gintmsk = 0; in dwc2_reset_enter()
1258 s->grxstsr = 0; in dwc2_reset_enter()
1259 s->grxstsp = 0; in dwc2_reset_enter()
1264 s->gpvndctl = 0; in dwc2_reset_enter()
1265 s->ggpio = 0; in dwc2_reset_enter()
1266 s->guid = 0; in dwc2_reset_enter()
1267 s->gsnpsid = 0x4f54294a; in dwc2_reset_enter()
1268 s->ghwcfg1 = 0; in dwc2_reset_enter()
1280 s->ghwcfg4 = 0; in dwc2_reset_enter()
1281 s->glpmcfg = 0; in dwc2_reset_enter()
1283 s->gdfifocfg = 0; in dwc2_reset_enter()
1284 s->gadpctl = 0; in dwc2_reset_enter()
1285 s->grefclk = 0; in dwc2_reset_enter()
1286 s->gintmsk2 = 0; in dwc2_reset_enter()
1287 s->gintsts2 = 0; in dwc2_reset_enter()
1293 s->hfnum = 0x3fff; in dwc2_reset_enter()
1295 s->haint = 0; in dwc2_reset_enter()
1296 s->haintmsk = 0; in dwc2_reset_enter()
1297 s->hprt0 = 0; in dwc2_reset_enter()
1299 memset(s->hreg1, 0, sizeof(s->hreg1)); in dwc2_reset_enter()
1300 memset(s->pcgreg, 0, sizeof(s->pcgreg)); in dwc2_reset_enter()
1302 s->sof_time = 0; in dwc2_reset_enter()
1303 s->frame_number = 0; in dwc2_reset_enter()
1305 s->next_chan = 0; in dwc2_reset_enter()
1308 for (i = 0; i < DWC2_NB_CHAN; i++) { in dwc2_reset_enter()
1357 usb_register_port(&s->bus, &s->uport, s, 0, &dwc2_port_ops, in dwc2_realize()
1359 (s->usb_version == 2 ? USB_SPEED_MASK_HIGH : 0)); in dwc2_realize()
1360 s->uport.dev = 0; in dwc2_realize()
1388 memory_region_add_subregion(&s->container, 0x0000, &s->hsotg); in dwc2_init()
1392 memory_region_add_subregion(&s->container, 0x1000, &s->fifos); in dwc2_init()