Lines Matching refs:pwmcfg
83 return s->pwmcfg & R_CONFIG_SCALE_MASK; in sifive_pwm_compute_scale()
90 if (HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_set_alarms()
151 bool was_incrementing = HAS_PWM_EN_BITS(s->pwmcfg); in sifive_pwm_interrupt()
155 s->pwmcfg |= R_CONFIG_CMP0IP_MASK << num; in sifive_pwm_interrupt()
162 if ((s->pwmcfg & R_CONFIG_ZEROCMP_MASK) && (num == 0)) { in sifive_pwm_interrupt()
164 s->pwmcfg &= ~R_CONFIG_ENONESHOT_MASK; in sifive_pwm_interrupt()
181 s->pwmcfg &= ~R_CONFIG_ENONESHOT_MASK; in sifive_pwm_interrupt()
188 if (was_incrementing && !HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_interrupt()
233 return s->pwmcfg; in sifive_pwm_read()
237 if (HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_read()
250 if (HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_read()
326 if ((!HAS_PWM_EN_BITS(s->pwmcfg) && HAS_PWM_EN_BITS(value)) || in sifive_pwm_write()
327 (HAS_PWM_EN_BITS(s->pwmcfg) && !HAS_PWM_EN_BITS(value))) { in sifive_pwm_write()
331 s->pwmcfg = value; in sifive_pwm_write()
337 if (HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_write()
347 if (HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_write()
379 s->pwmcfg = 0x00000000; in sifive_pwm_reset()
401 VMSTATE_UINT32(pwmcfg, SiFivePwmState),