122 static uint32_t npcm7xx_tcsr_prescaler(uint32_t tcsr)  in npcm7xx_tcsr_prescaler()  argument
124     return extract32(tcsr, NPCM7XX_TCSR_PRESCALE_START,  in npcm7xx_tcsr_prescaler()
133     ticks *= npcm7xx_tcsr_prescaler(t->tcsr);  in npcm7xx_timer_count_to_ns()
145         npcm7xx_tcsr_prescaler(t->tcsr);  in npcm7xx_timer_ns_to_count()
201     bool pending = (t->tcsr & NPCM7XX_TCSR_IE) && (tc->tisr & BIT(index));  in npcm7xx_timer_check_interrupt()
218     if (t->tcsr & NPCM7XX_TCSR_PERIODIC) {  in npcm7xx_timer_reached_zero()
220         if (t->tcsr & NPCM7XX_TCSR_CEN) {  in npcm7xx_timer_reached_zero()
224         t->tcsr &= ~(NPCM7XX_TCSR_CEN | NPCM7XX_TCSR_CACT);  in npcm7xx_timer_reached_zero()
241     if (old_tcsr & t->tcsr & NPCM7XX_TCSR_CEN) {  in npcm7xx_timer_restart()
250     if (t->tcsr & NPCM7XX_TCSR_CEN) {  in npcm7xx_timer_read_tdr()
261     uint32_t old_tcsr = t->tcsr;  in npcm7xx_timer_write_tcsr()
284     t->tcsr = (t->tcsr & NPCM7XX_TCSR_CACT) | new_tcsr;  in npcm7xx_timer_write_tcsr()
289         if (old_tcsr & t->tcsr & NPCM7XX_TCSR_CEN) {  in npcm7xx_timer_write_tcsr()
299         t->tcsr &= ~NPCM7XX_TCSR_CRST;  in npcm7xx_timer_write_tcsr()
303             t->tcsr |= NPCM7XX_TCSR_CACT;  in npcm7xx_timer_write_tcsr()
306             t->tcsr &= ~NPCM7XX_TCSR_CACT;  in npcm7xx_timer_write_tcsr()
319     npcm7xx_timer_restart(t, t->tcsr);  in npcm7xx_timer_write_ticr()
439         value = s->timer[npcm7xx_tcsr_index(reg)].tcsr;  in npcm7xx_timer_read()
544     if (t->tcsr & NPCM7XX_TCSR_CEN) {  in npcm7xx_timer_expired()
558         t->tcsr = 0x00000005;  in npcm7xx_timer_enter_reset()
656         VMSTATE_UINT32(tcsr, NPCM7xxTimer),