40                 ## __VA_ARGS__); } while (0)
42 #define DPRINTF(fmt, ...) do {} while (0)
46 #define     EXYNOS4210_PWM_REG_MEM_SIZE    0x50
48 #define     TCFG0        0x0000
49 #define     TCFG1        0x0004
50 #define     TCON         0x0008
51 #define     TCNTB0       0x000C
52 #define     TCMPB0       0x0010
53 #define     TCNTO0       0x0014
54 #define     TCNTB1       0x0018
55 #define     TCMPB1       0x001C
56 #define     TCNTO1       0x0020
57 #define     TCNTB2       0x0024
58 #define     TCMPB2       0x0028
59 #define     TCNTO2       0x002C
60 #define     TCNTB3       0x0030
61 #define     TCMPB3       0x0034
62 #define     TCNTO3       0x0038
63 #define     TCNTB4       0x003C
64 #define     TCNTO4       0x0040
65 #define     TINT_CSTAT   0x0044
67 #define     TCNTB(x)    (0xC * (x))
68 #define     TCMPB(x)    (0xC * (x) + 1)
69 #define     TCNTO(x)    (0xC * (x) + 2)
71 #define GET_PRESCALER(reg, x) (((reg) & (0xFF << (8 * (x)))) >> 8 * (x))
72 #define GET_DIVIDER(reg, x) (1 << (((reg) & (0xF << (4 * (x)))) >> (4 * (x))))
78 #define     TCON_TIMER_BASE(x)          (((x) ? 1 : 0) * 4 + 4 * (x))
79 #define     TCON_TIMER_START(x)         (1 << (TCON_TIMER_BASE(x) + 0))
145             EXYNOS4210_PWM_TIMERS_NUM, 0,
162         ((GET_PRESCALER(s->reg_tcfg[0], 1) + 1) *  in exynos4210_pwm_update_freq()
166         ((GET_PRESCALER(s->reg_tcfg[0], 0) + 1) *  in exynos4210_pwm_update_freq()
223     uint32_t value = 0;  in exynos4210_pwm_read()
238         index = (offset - TCNTB0) / 0xC;  in exynos4210_pwm_read()
244         index = (offset - TCMPB0) / 0xC;  in exynos4210_pwm_read()
250         index = (offset == TCNTO4) ? 4 : (offset - TCNTO0) / 0xC;  in exynos4210_pwm_read()
284         for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) {  in exynos4210_pwm_write()
292         for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) {  in exynos4210_pwm_write()
329         index = (offset - TCNTB0) / 0xC;  in exynos4210_pwm_write()
335         index = (offset - TCMPB0) / 0xC;  in exynos4210_pwm_write()
340         new_val = (s->reg_tint_cstat & 0x3E0) + (0x1F & value);  in exynos4210_pwm_write()
341         new_val &= ~(0x3E0 & value);  in exynos4210_pwm_write()
343         for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) {  in exynos4210_pwm_write()
369     s->reg_tcfg[0] = 0x0101;  in exynos4210_pwm_reset()
370     s->reg_tcfg[1] = 0x0;  in exynos4210_pwm_reset()
371     s->reg_tcon = 0;  in exynos4210_pwm_reset()
372     s->reg_tint_cstat = 0;  in exynos4210_pwm_reset()
373     for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) {  in exynos4210_pwm_reset()
374         s->timer[i].reg_tcmpb = 0;  in exynos4210_pwm_reset()
375         s->timer[i].reg_tcntb = 0;  in exynos4210_pwm_reset()
399     for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) {  in exynos4210_pwm_init()
418     for (i = 0; i < EXYNOS4210_PWM_TIMERS_NUM; i++) {  in exynos4210_pwm_finalize()