Lines Matching +full:ctrl +full:- +full:module
12 /* This is a model of the "APB timer" which is part of the Cortex-M
13 * System Design Kit (CMSDK) and documented in the Cortex-M System
15 * https://developer.arm.com/products/system-design/system-design-kits/cortex-m-system-design-kit
27 * interrupt (as there is no further 1->0 transition).
32 #include "qemu/module.h"
38 #include "hw/qdev-clock.h"
39 #include "hw/timer/cmsdk-apb-timer.h"
42 REG32(CTRL, 0)
43 FIELD(CTRL, EN, 0, 1)
44 FIELD(CTRL, SELEXTEN, 1, 1)
45 FIELD(CTRL, SELEXTCLK, 2, 1)
46 FIELD(CTRL, IRQEN, 3, 1)
73 qemu_set_irq(s->timerint, !!(s->intstatus & R_INTSTATUS_IRQ_MASK)); in cmsdk_apb_timer_update()
83 r = s->ctrl; in cmsdk_apb_timer_read()
86 r = ptimer_get_count(s->timer); in cmsdk_apb_timer_read()
89 r = ptimer_get_limit(s->timer); in cmsdk_apb_timer_read()
92 r = s->intstatus; in cmsdk_apb_timer_read()
95 r = timer_id[(offset - A_PID4) / 4]; in cmsdk_apb_timer_read()
123 s->ctrl = value & 0xf; in cmsdk_apb_timer_write()
124 ptimer_transaction_begin(s->timer); in cmsdk_apb_timer_write()
125 if (s->ctrl & R_CTRL_EN_MASK) { in cmsdk_apb_timer_write()
126 ptimer_run(s->timer, ptimer_get_limit(s->timer) == 0); in cmsdk_apb_timer_write()
128 ptimer_stop(s->timer); in cmsdk_apb_timer_write()
130 ptimer_transaction_commit(s->timer); in cmsdk_apb_timer_write()
134 ptimer_transaction_begin(s->timer); in cmsdk_apb_timer_write()
136 ptimer_stop(s->timer); in cmsdk_apb_timer_write()
138 ptimer_set_limit(s->timer, value, 1); in cmsdk_apb_timer_write()
139 if (value && (s->ctrl & R_CTRL_EN_MASK)) { in cmsdk_apb_timer_write()
142 * was an expired one-shot timer) in cmsdk_apb_timer_write()
144 ptimer_run(s->timer, 0); in cmsdk_apb_timer_write()
146 ptimer_transaction_commit(s->timer); in cmsdk_apb_timer_write()
149 ptimer_transaction_begin(s->timer); in cmsdk_apb_timer_write()
150 if (!value && !ptimer_get_limit(s->timer)) { in cmsdk_apb_timer_write()
151 ptimer_stop(s->timer); in cmsdk_apb_timer_write()
153 ptimer_set_count(s->timer, value); in cmsdk_apb_timer_write()
154 if (value && (s->ctrl & R_CTRL_EN_MASK)) { in cmsdk_apb_timer_write()
155 ptimer_run(s->timer, ptimer_get_limit(s->timer) == 0); in cmsdk_apb_timer_write()
157 ptimer_transaction_commit(s->timer); in cmsdk_apb_timer_write()
162 s->intstatus &= ~value; in cmsdk_apb_timer_write()
187 if (s->ctrl & R_CTRL_IRQEN_MASK) { in cmsdk_apb_timer_tick()
188 s->intstatus |= R_INTSTATUS_IRQ_MASK; in cmsdk_apb_timer_tick()
198 s->ctrl = 0; in cmsdk_apb_timer_reset()
199 s->intstatus = 0; in cmsdk_apb_timer_reset()
200 ptimer_transaction_begin(s->timer); in cmsdk_apb_timer_reset()
201 ptimer_stop(s->timer); in cmsdk_apb_timer_reset()
203 ptimer_set_limit(s->timer, 0, 1); in cmsdk_apb_timer_reset()
204 ptimer_transaction_commit(s->timer); in cmsdk_apb_timer_reset()
211 ptimer_transaction_begin(s->timer); in cmsdk_apb_timer_clk_update()
212 ptimer_set_period_from_clock(s->timer, s->pclk, 1); in cmsdk_apb_timer_clk_update()
213 ptimer_transaction_commit(s->timer); in cmsdk_apb_timer_clk_update()
221 memory_region_init_io(&s->iomem, obj, &cmsdk_apb_timer_ops, in cmsdk_apb_timer_init()
222 s, "cmsdk-apb-timer", 0x1000); in cmsdk_apb_timer_init()
223 sysbus_init_mmio(sbd, &s->iomem); in cmsdk_apb_timer_init()
224 sysbus_init_irq(sbd, &s->timerint); in cmsdk_apb_timer_init()
225 s->pclk = qdev_init_clock_in(DEVICE(s), "pclk", in cmsdk_apb_timer_init()
233 if (!clock_has_source(s->pclk)) { in cmsdk_apb_timer_realize()
238 s->timer = ptimer_init(cmsdk_apb_timer_tick, s, in cmsdk_apb_timer_realize()
244 ptimer_transaction_begin(s->timer); in cmsdk_apb_timer_realize()
245 ptimer_set_period_from_clock(s->timer, s->pclk, 1); in cmsdk_apb_timer_realize()
246 ptimer_transaction_commit(s->timer); in cmsdk_apb_timer_realize()
250 .name = "cmsdk-apb-timer",
256 VMSTATE_UINT32(ctrl, CMSDKAPBTimer),
268 dc->realize = cmsdk_apb_timer_realize; in cmsdk_apb_timer_class_init()
269 dc->vmsd = &cmsdk_apb_timer_vmstate; in cmsdk_apb_timer_class_init()